CS6290/CS4290: High-Performance Computer Architecture Homework 3, Assignments of Computer Science

Download CS6290/CS4290: High-Performance Computer Architecture Homework 3 and more Assignments Computer Science in PDF only on Docsity! GEORGIA INSTITUTE OF TECHNOLOGY College of Computing CS6290/CS4290 — High-Performance Computer Architecture Fall 2001 CS6290/CS4290 Issued: September 30, 2001 Homework 3 Due: October 5, 2001 Purpose: This homework reviews pipeline operation and instruction-level parallelism. Problems: 1. Pipeline Operation. 2. Instruction Scheduling. 3. Write a paragraph about [Fisher91]. Reading: H&P Chapters 3, 4.1. [Fisher91] Problem 1: Pipeline Operation A: Problem 3.1 in the book. Note that the question describes three different branching strategies. Part A refers to the original pipeline (Figure 3.4) which has a three-cycle branch penalty when you “flush” the pipeline (Figure 3.21). Part B says to use predict- not-taken which means you suffer the three-cycle penalty only if the branch is taken. Part C says to use the standard one-delay slot. The correct circuit diagram for a single delay slot is in the lecture slides (Figure 3.22 has a subtle bug in it). CS6290/CS4290 Fall 2001 – 1 – September 30, 2001