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3 Solved Problems on Advanced VLSI Design and Applications - Test | ECEN 6263, Exams of Electrical and Electronics Engineering

Material Type: Exam; Professor: Johnson; Class: ADV VLSI DES & APP; Subject: Electrical and Computer Engineering ; University: Oklahoma State University - Stillwater; Term: Fall 2002;

Typology: Exams

2010/2011

Uploaded on 07/17/2011

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Download 3 Solved Problems on Advanced VLSI Design and Applications - Test | ECEN 6263 and more Exams Electrical and Electronics Engineering in PDF only on Docsity! vw wu ECEN 6263 Fall 2002 Exam 2 WRITE YOUR NAME HERE Answ er All questions must be answered on test paper! Open Book, Open Notes 1. The circuit below is known to cause a glitch. Assume that the delays in the circuit are such that the glitch, when it occurs, is full swing. at M1 P; Yi i 2 uy M2 4 Cy a.Sketch the voltage waveforms for V2, V3 and V, when Vjis as shown below. Show the value of the voltages in the diagram. Assume that V;(t) = 0 for t<0. 4 V; Low [ay Ya \® Gu >t Vy vu | val / _ et CEN 6263 Fall 2002 Exava 2 November 13, 2002 jo b. What is the power dissipation assuming that V; is a square wave with frequency f _ . ~~ A L Pe £F(Ca tS Mave +4: 20) from bi) | he (Qt tGlub-ve) ) from (2) =F (Cras (Uo Varn) + Qa’) 2, The adder below is designed with a worst case delay of Ins. How long would it take to do exhaustive testing if the adder is tested as fast as possible? Cin 7 mp = o2!? tists (we intornnd storr4.) fastest tore wd as / ted tye fu 377 Tet 5 s . (7 , 4° T= 2 xp sep k3law x val oe ” = [31 xipt feet ECEN 6263 Fell 2002 Exam 2 November 13, 2002
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