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Building an Arithmetic Logic Unit (ALU) for MIPS: Logic Gates, Adders, and Subtraction, Slides of Computer Science

An in-depth exploration of building an arithmetic logic unit (alu) for the mips instruction set. Topics include logic gates, half-adders and full-adders, ripple carry adders, faster adders, and tailoring the alu to support subtraction and set-on-less-than (slt) instructions.

Typology: Slides

2012/2013

Uploaded on 03/22/2013

dhimant
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Download Building an Arithmetic Logic Unit (ALU) for MIPS: Logic Gates, Adders, and Subtraction and more Slides Computer Science in PDF only on Docsity! Arithmetic II CPSC 321 Docsity.com Today’s Menu Arithmetic-Logic Units Logic Design Revisited Faster Addition Multiplication (if time permits) Docsity.com Logic Gates • NOR gate • NAND gate • XOR gate What are the truth tables? Docsity.com Half Adder s c a b a b c s 0 0 0 0 0 1 0 1 1 0 0 1 1 1 1 0 Docsity.com Full Adder cin a b cout s 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 Give a Boolean formula for s • s=cin xor a xor b Give a Boolean formula for cout • cout =ab+cin(a xor b) Design now a circuit using and, or, xor. Docsity.com Critical Path cin a b cout s Suppose that each gate has a unit delay. What is the critical path (= path with the longest delay)? Docsity.com Ripple Carry Adders • Each gates causes a delay – our example: 3 gates for carry generation – book has example with 2 gates • Carry might ripple through all n adders – O(n) gates causing delay – intolerable delay if n is large • Carry lookahead adders Docsity.com Faster Adders cin a b cout s 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 cout=ab+cin(a xor b) =ab+acin+bcin =ab+(a+b)cin = g + p cin Generate g = ab Propagate p = a+b Why are they called like that? Docsity.com Building an ALU 0 2 Result Operation a 1 CarryIn CarryOut 0 1 Binvert b Addition Subtraction AND OR What is missing? Docsity.com Tailoring the ALU to the MIPS • Need to support the set-on-less-than instruction (slt) – remember: slt is an arithmetic instruction – produces 1 if rs < rt and 0 otherwise – use subtraction: (a-b) < 0 implies a < b • Need to support test for equality (beq $t5, $t6, $t7) – use subtraction: (a-b) = 0 implies a = b Docsity.com SLT • Determine a<b • Calculate b-a • If MSB equals – 1, then a<b – 0, then a>=b • Changes? – Operation less than – Output of subtraction – Overflow 0 2 Result Operation a 1 CarryIn CarryOut 0 1 Binvert b Docsity.com Test for equality • Notice control lines: 000 = and 001 = or 010 = add 110 = subtract 111 = slt •Note: zero is a 1 when the result is zero! Set a31 0 Result0a0 Result1a1 0 Result2a2 0 Operation b31 b0 b1 b2 Result31 Overflow Bnegate Zero ALU0 Less CarryIn CarryOut ALU1 Less CarryIn CarryOut ALU2 Less CarryIn CarryOut ALU31 Less CarryIn Docsity.com Summary • We can build an ALU to support the MIPS instruction set • key idea: use multiplexor to select the output we want • we can efficiently perform subtraction using two’s complement • we can replicate a 1-bit ALU to produce a 32-bit ALU • Important points about hardware • all of the gates are always working • the speed of a gate is affected by the number of inputs to the gate • the speed of a circuit is affected by the number of gates in series (on the “critical path” or the “deepest level of logic”) • We focused on basic principles. We noted that • clever changes to organization can improve performance (similar to using better algorithms in software) • faster addition, next time: faster multiplication Docsity.com
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