Bipolar Transistor as an Inverter: Understanding Quiescent Voltages and Biasing - Prof. Au, Study notes of Electrical and Electronics Engineering

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Base-Fmitter Circuit Relationships © Fer base-emitter circuit Voce) te (© At bose current = zero, Var = Vor © At emitter-bese vltnge = zero, Base-Emitter Load Line (npn) Current-Voltage Characteristics Common-Emitter Configuration Collector- Emitter Relationships Collector Load Line (npn) © For circuit, fe atom pease ty, [fe strate gen Ba Collector-Emitter Relationships © Asi, increases oF decreases 4 G print nove up or dorm kad re © If i, increases too much $Q point gushed into schration region eh tration 4 Ve pil 0.17003 V, ose 02 ¥ ic ima) te isa #—evndacemts at Sonaation 4] (o) Problem-Solving Technique: Bipolar DC Analy: Analyzing the de response of a hipolar transistor cirenit requires knowing the mode of operation of the transistor. In some cases, the mode of operation may uot by obvious, which means that we have to guess the state of the transistor, then analyze the cireuit to d nitial guess. To do this, we ea ermine if we have a solution consistent with our 1. Assume that the Uansisior is biased in the lorwaid-active mode in which case V g¢ — Vgp(on), fy > 0, and Ie — Bly. Analyze the “linear” circuit with this assumption 3. Evaluate the resulting state of the vansistor. If the initial assumed pa- and Veg > Vee(sat) are true, then the initial assumption s correct. However, if In <0, then the transistor is probably cut off, and if Vex <0, the transistor is likely hia rameter valu in saturation 4. Uf the initial assumption is proven Liconeet, then a new assuiuption must be made and the new “linear” circuit must be analyzed. Siep 3 must then he repeated  lExample 3.5 Objecive: C rans i river into sion For te circuit shown in Figure 3.23, the (or) = 0.7, the transis is ise in culate the currents ane solages i @ vite whe te sor paraners| uration, usm 3 ‘r(sil JBoluion: Since 48¥ is applied to the tap side of Ry, the base enter junction is etal f bass, s0 the tanastor is tured on, The base curve is | Va Falon) _9 De z ay ah I ve fs sve thatthe (ranssfor is biased in the active gion, shen the eoleetor ren is ney jail (1O(83.2pA) > 332m ths colkvtor-emiter voltage is then y ‘on = Vee = bee = 10=(Q22)8) = -R8V However, the clleto-eniter volage ofthe ape tansr in the commoner onlguaton shown in Figure 32Ma cannot be negative. Throne, eur inal assump on ofthe tanto bi bas the orwunacve meine, Ise, the assor mst be bi tio, Aspen inthe objec din it ements Hy (sa) = 0.2, The eoleioreurent i Ie = Isat) = Assuming that the B-E voltage is still equal to Vs,(on) = 0.7 V. the base current is I =33.2UA, as previously determined. If we take the ratio of collector current to base current, then swe Ie _ Ty 0.0332 <p conan |! The emitter current is Tp = Te + I = 2.45 £0,033 = 248A Comment When a transistor is driven into saturation, we use Vcp(sat) 2s another piecewise linear parameter. In addition, when a transistor is biased in the saturation mode, we have Ig < fil. This condition is very often used to prove that a transistor is indeed biased in the saturation mode. Bias conditions for the four modes of operation of an npn transistor Vre Inverse-active Saturation VBE Cutoff Forward-active BIT Operation Applications ® Generally for analog circuits Want to operate in only the forward active region Otherwise, very non-linear operation. ® Generally for digital circuits Might want to operate between cut-off and saturation regions.  Voltage-D ‘Vokage divider Direct-Current Equivalent Wolkage divider Zt [Stabilizing resistor Thévenin Equivalent of Base BJT Bias Stability Vin = Ringo * Vector) * leaRe i" Vin = Ring +Vee(on) + (B+ DIsRe Igy = Vn Vee fe Troe 1, = Bm™ Veezon) 60 Rin * BF DRE For Bias Stability: Rr, << (1 +B) Re  For Bias Stability: Rr << (1+ 8) Re Then leo = B (Vn = Vecion)) co BE RE If B >> 1, then Bi(1 + B)~ 4 Therefore, BIT Bias Stability General Rule For Bias Stable Circuit R A(14+6)Re Th BJT Biasing — Resistor Tolerances © Typical resistor tolerances: @ + 5 % for carbon film or metal-oxide film # +1 % for metal film (also + 0.1 %) @ The Q-point is a function of resistor values BJT Thermal Runaway © Without Re © Expect junction current increase to cause temperature increase (I?R) This AT can cause further current increase. thereby further increasing temperature, ® Phenomenon -- thermal runaway. ® Result  BIT Thermal Runaway @ Without R; @ Expect junction current increase to couse temperature increase (I?R) ® This AT con cause further current increase thereby further increasing temperature. ® Phenomenon -- thermal runaway, ® Result -- device destruction: BIT Thermal Runaway @ R. stabilizes Q-point with respect to temperature. @ AT causes Al which results in AV, (to ground) # Rp, independent of AT ® Therefore, AV; reduces Vag (junction) ® AVo¢ tends to stabilize transistor current Design Example 3.15 Objective: _Desiuu « biasrntable creat ‘ouside Ht shown ia Figure 33a) Lot bee = SV. de = 1 kee yp sud determin’ 4, Sud Ky such tat the Solution: With B= 120, Jeg © Ing. Then, choosing 1 standard value of 0,5LK for Rg. we find Veo Verg | His feo Ra Re Teast Sk ‘The voltage drop across Ris now {1.32X0.51) =0.673Y. which is approximately the Aesired value, The hase eurret is found to be Using the Thevenin equivalent circuit in Figure 3.53(0), we find gg = Ere V a0) Ry + + AR : For a bias stable circuit, Ryy = 0.11 + A)Rp. oF ro Fn = .1NIR190.19 = 61788 aes Then , . it—e Joy = MO pA i 2 which ies l ‘ Vpn = 0787 40.700 LAS Now ” (0.288) Rakske Fiom Appeodis D, we can vlionse standard tesiter values af Ry Ry = 8.249. Comment: Th: Q-poit in tus example snow consider sailed agains variations “Wy in and the voltage diver resistors R, and Ry have reasonable values in the lo Lange