BIPOLAR TRANSISTOR FAMILARIZATION AND TRANSISTOR TESTING, Lab Reports of Electronics engineering

Download BIPOLAR TRANSISTOR FAMILARIZATION AND TRANSISTOR TESTING and more Lab Reports Electronics engineering in PDF only on Docsity! EXPERIMENT NO. 6 BIPOLAR TRANSISTOR FAMILARIZATION AND TRANSISTOR TESTING I. Objectives 1. To learn about biasing of transistors and to measure ICBO. 2. To determine the relationship between emitter, base and collector currents. 3. To determine the effects on emitter-base and collector current of forward and reverse bias in emitter base circuit. 4. To have an understanding about the rules on proper handling of transistors and for making measurements. 5. To determine the state of bipolar transistor. 6. To determine whether a bipolar transistor is conducting or non-conducting when used as a switch. II. DISCUSSION: The advantage of this three-terminal solid-state device over the tube were obvious. Transistor was smaller and light weight; had no heater requirement or heater loss; had rugged construction; and was more efficient since the device itself absorbed less power. It was instantly available for use, requiring no warm up period and lower operating voltage were possible. You will find that all amplifiers (devices that increases the voltage, current and power level) will have at least three terminals with one controlling the flow between other two terminals. Transistor may be classified according to the basic material and in this category, we find germanium and silicon transistors. TRANSISTOR CONSTRUCTION Transistor is a three-layer semiconductor device containing of either two n- and one p- type layers of material or two p- and one n-type material layers of material. The former is called NPN transistor and the latter is called PNP transistor. Both are shown in Fig 6. with proper DC biasing. The emitter layer is heavily doped, the base is lightly doped, and the collector is only lightly doped. The outer layers have widths much greater than the sandwiched p- and n-type materials for the biasing shown in fig. 6 the terminals have been indicated by the capital letters E for emitter, C for collector and B for base. E C E P N P C N P N B B Vee Vcc Vee Vcc TRANSISTOR OPERATION: Fig. 6 The basic operation of the transistor will now be considered using PNP transistor if Fig. 6a. The operation of the NPN transistor is exactly the same if the roles played by the electron and hole are interchanged. In Fig. 6.2. the PNP transistor has been redrawn without the base to collector bias. The depletion region has been reduced in width due to applied bias, resulting in a heavy flow of majority carriers from the p- to the n-type material Let us now remove the base-to-emitter bias of the PNP transistor of Fig. 6.1a as shown in Fig. 1.3. One p-n junction of a transistor is reverse biased, while the other is forward biased. In Fig 6.4 both biasing potentials has been applied to a PNP transistor, with the resulting majority and minority- carrier flow indicated. Note in Fig 6.4 the widths of the depletion regions, indicating clearly which junction is forward biased and which is reverse biased. As indicate in Fig. 6a large numbers of majority carriers will diffuse across the forward biased p-n junction into the n-type material. The question then is whether these carriers will contribute directly to the base current in or pass directly into the p-type material. Since the sandwiched p-type material is very thin and has a low S1 S1S1 IV. PROCEDURE A. PNP BIASING R1 R1 R2 R2 VEE A VEE A A A R3 VCC R3 Fig. 6.5 Current-voltage measurement in the emitter base- circuits Fig. 6.6 Current-voltage measurement in the emitter and collector circuit of a PNP transistor 1. Consider power is ON. Set R2 to maximum resistance. Measure and record emitter date of currents in table 6. Also, measure and record emitter-base and collector base Voltage and Specify its voltage polarities 2. Set R2 for minimum resistance to apply maximum emitter bias. Measure and record emitter and collector current, emitter-base and collector-base voltage in table 6. Specify polarities 3. Consider power is OFF. Measure and record current in emitter and collector circuits and emitter-base and collector-base voltages in table 6. Specify polarities 4. Again, consider the power in ON. Measure and record current in emitter and collector circuits and emitter-base and collector-base voltages in table 6. Specify polarities 5. Upon the emitter-base circuit by opening S1, S2 is open. a. Measure and record collector current in table 6, the value is Iceo for the circuit conditions. Measure and record collector-base voltage in table 6 then specify the polarities. S2 is closed NPN BIASING 6. Consider the power is OFF. Substitute NPN transistor from PNP transistor as shown in Fig 6.7. Take note of the polarity of the Vcc. R2 = 5kΩ R2 = 100Ω VEE = 12V A 2N2222 VEE = 6V A R3 = 1kΩ Fig 1.7 Current-Voltage measurements in the emitter & collector currents of an NPN transistor 7. Set R2 for maximum resistance when S2 is closed. Measure and record the data of emitter and collector currents and emitter-base and collector-base voltage in table 6. Specify its voltage polarities..\ 8. Set R2 for minimum resistance when S2 is closed. Measure and record the data of emitter and collector currents and emitter-base and collector-base voltage in table 6. Specify its voltage polarities. 9. Consider the power OFF. Reverse the polarity of emitter battery (Vcc) and the connecting Digital tester. Maintain R2 for minimum resistance. 10. Consider the power ON. Measure and record the current in emitter and collector circuits and emitter-base and collector-base voltage and record voltage in table 6. Specify voltage polarities. 11. Open the emitter-base circuit by opening S1 when S2 is open. 12. When S2 is close, measure and record emitter and collector currents, and collector-base voltage in table 6. Now turn off the power PROCEDURE B: BIPOLAR TRANSISTOR TESTING - + Rbc c + b Rcb c - b e Rbe e Rcb - + (A) (B) - + Rbc c Rcb c + b - b e Rbe e Reb - (C) + (D) 1. Set the digital tester to ohmmeter mode and proper calibration. a. With your NPN transistor, connect the digital probe tester to each junction alternately. Refer to Fig 6.8 a and b. Record the reading in table 6.8 2. Using a PNP transistor, perform the same procedure as in step 2, refer to Fig 6.8 c and d. Record your readings in table 6. R1 1009 $1 Key=A R2 1kO |v —12V ‘Ty Vee + Set, _ = oh a1 BO NTO XxMM2 $2 Ea Key=A 402 @ LT M4 v Q | | dB —=6V = ‘] Vee | = R3 + = - = 1kQ I — je —— 2» 1kQ R1 1000 Multimeter-XMM1 x $1 Key=A R2 1kQ “|v —12V Vee oh, Qt PT 2N3702 $2 Key=A LT “iM =v Vec R3 + = - 1kQ $2 Key=A R3 oh, 1 a ig 2N3702 1kQ. R3 1kQ Oa 2N3702 R2 5kO oy Q1 XMM2 aA q @ LT R1 1000 Key=A eT EE 2N3702 R2 1ka Hh al XMM2 on yg ¢ [oT Vec R3 1kQ R1 1009 $1 Key=A R2 1kQ ai 2N3702. XMM2 $2 =a Key=A t ® | i v1 = 6V Vec R3 = 1kQ VI. COMPUTATION OF DATA RESULTS VB=2.638MV IC=−52.605nA=0V ¿0V VC=12V IC=12.079nA IE=14.597nA ¿0V ¿0V VB=4.395mV IC=−3.675nA ¿0V VC=3.915V IC=3.675nA IE=13.751 pA¿0V ¿0V IB=76.003 pA ¿0V VII. QUESTIONS 1. Show the relationship between base, emitter and collector current. 2. What is Icbo or Ico? Explain how it was measured. 3. Verify the relationship experimentally for the PNP and NPN transistors. Draw the schematic diagram for the circuit that you used and give the detailed procedure you followed 4. What is the effect of increasing emitter bias on the collector? Refer to your measured data. 5.What are the effects on the collector current and reverse bias on the emitter-base circuit? Refer to your measured data 6. If both junctions of a transistor result in the expected readings, how can you determine the type of transistor? 7. Referring to your data in table 6.8, for both PNP and NPN transistor, how can you determine if the active region is forward biase ANSWERS: 1. The current flowing through the emitter is very high since it is the sum of the base and collector currents, so the collector current output is smaller than the emitter current input, resulting in a current gain of 1 or less for this kind of circuit. 2. In the collector junction reverse biased and the foundation open-circuited, the collector current is ICBO. With the collector junction reverse biased and the emitter open-circuited, the collector current is ICEO. When the transistor is connected in two separate configurations, on common base and common emitter respectively. 3. During the "on" condition, PNP sensors generate a positive signal to your industrial controls feedback, while NPN sensors produce a negative signal. 4. The collector–emitter voltage affects the current gain due to the temperature which affects both gain and base–emitter voltage. As the VC goes higher from 12VC and 3.915VC which temperature has an impact on the leakage current. To minimize the effects of system fluctuations, temperature, and voltage shifts, a bias network is chosen. 5. It has the same effects when increasing emitter bias which also affects the temperature on the experiment in the data it has both a lower current of 12.079nA and 3.675nA which does not affect that much on the temperature. 6. In the NPN transistor with both PN junctions pointing in the opposite direction Low resistance readings with the red, positive (+) lead on the base are the NPN transistor's "opposite" state.