Computer Architecture and Design Homework 6: MIPS Instruction Execution Schematics - Prof., Assignments of Computer Architecture and Organization

Download Computer Architecture and Design Homework 6: MIPS Instruction Execution Schematics - Prof. and more Assignments Computer Architecture and Organization in PDF only on Docsity! ELEC 5200-001/6200-001 Computer Architecture and Design Spring 2007 Homework 6 Problems Assigned 3/23/07, due 4/4/07 Note: A useful, though not essential, reference is: B. Parhami, Computer Architecture from Microprocessors to Supercomputers, New York: Oxford, 2005. Problem 1: Write a MIPS instruction that reads from and writes to the same register. Sketch a schematic showing the execution of this instruction in a single- cycle MIPS datapath. In your schematic you may include only those units that participate in the execution of the instruction. If you are the designer how will you ensure that register read and write are done in the correct order? Problem 2: Sketch a schematic showing a multicycle MIPS datapath for the execution of the jump and link (jal) instruction. In your schematic you may include only those units that participate in the execution of this instruction.