Computer architecture at Johns Hopkins, Exercises of Computer Architecture and Organization

Download Computer architecture at Johns Hopkins and more Exercises Computer Architecture and Organization in PDF only on Docsity! - 21- COMPUTER ARCHITECTURE AT JOHNS HOPKINS by Michael J. Flynn Computer Science The Johns Hopkins U n i v e r s i t y . Baltimore, Maryland 21218 The research program in computer architecture at The Johns Hopkins University is basically a continuation of a program originally developed at NorthwesternUniversity and moved in 1970 to Hopkins. It presently consists of myself and secretary (Mrs. Rogers), together with four Pre- doctoral Fellows (R. Regis, G. TJaden, C. Neuhauser and J. Misra) and two research associates (Dr. S. P. Kartashev and Dr. V. I. Kartashev). The size of the staff and number of students have varied over the years (starting in 1966 at Northwestern), but our present Complement is probably about as large as we have ever been. From the beginning the work has been sponsored (at least in part) by the U. S. Atomic Energy Commission; originally at Argonne National Labora- tory and later through spearate research contracts. The program is based upon my own view of computer systems architecture which tends to be quite broad. Any algorithm which directly controls the physical resources of the system is a candidate to study and analysis. Thus we have worked over the years in areas such as arithmetic, ultra-reliable computing, computational complexity (of finite domain algorithms), as well as computer organization. We have been especially interested in parallel organizations of various kinds and especially interested in both categorizing organizations and * All work described in this note was supported in whole or part by the United States Atomlc Energy Cu.m,lssion under contract No. AT(ii-i)3288 or a predecessor contract. Page• 2 - 22- evaluating their effectiveness. We have placed speclal emphasis on five particular areas : • I. microprogrammed processors, 2. SIMD (single instruction stream - multlple data stream) or master-slave parallel processors, 3. shared resource multlprocessors, 4. general models of organization, and 5. simultaneous execution of (possibly) dependent tasks. HI CROP ROGRAFR~ING To us mlcroprogrammlng means systematic control through the use of fast memory. 1'9'II "Fast" means ,simply a memory~ whose access is of the same order of the prlmitlv~comblnatlonal operations of the system. The existence of such memory protends many changes in the traditional view of computer organizations. While many of these propositions have been explored elsewhere, one of the most interesting ones, is the fact that the "mlcrolnstructlon" is in itself a vehicle for a type of explicit parallel- ism where the progrannner simultaneously handles the various resources of the system. The mlcrolnstructlon then is not simply (as is the conventional instructions) the control of a single piece of data through a predetermined set of resources in a serial way, but rather it allows the simultaneously actions of the various internal resources of the system on several data items at the same time. Many interesting questions rema.ln open about this approach (minimizing the size of mlcrostorage, I nterfaclng between the mlcrolnstruc- tion and higher level program,etc.). SIMD PROCESSORS The second of our activities is concerned with the forms and effective- ness of the various types of parallel processors. 12 Parallel in our sense means a single master with many slave processors. IThe slave processors may Page 5 • 2 5 - in fact programs are executed sequentially on the single CPU. On the other • hand, a machine like IBM 360/91 on CDC~ 7600 seems:to be highly sequential, while in fact several operations can beexecuted simultaneously. To cater with this pr,oblem, a system model of interactions has been developed, which is "portable"fKom one reference point or "level" to another, i.e. independent of the particular nature of the resources*. The notion of process is formally defined, recursively~ as a pair of functions: the request or logical function which specifies the mathematical mapping to be realized and its relation with the other processes, and the servlce or operational function which indicates how the request is serviced and realizes the necessary mapping between logical and physical resources. While in a purely sequential process the ordering between successive instructions is total (and thus, can be implicit), in a prallel process it is only partial (allowing two instructions not to be ordered with respect to each other and thus be executed simultaneously). In that case the ordering must be made explicit. This is the role of the request: it contains information about the precedence of the process with respect to the other processes. Four different types of dependency are identified. The service of a request is achieved by issuing a poser of (sub) requests at the next lower level, the process ending when the physical level is reached. Once a point of view has been properly defined, a process is defined as a partially ordered set of subprocesses. ~he next question to be addressed is the determinacy of the process, i.e. whether several executions of the process with the same initial data will produce the same results. This question is crucial to the correct operation ' of a multlprocesslng system. A simple and general graph model is presented and necessary and su~Iclent ConditlOns are given to check ~hedeter~ of a given process, as well m, * I t i s based on a p r e v i o u s work r e p o r t e d i n Hopkins Resea rch R e p o r t #14. Page 6 - 26 - as other important properties (consistancy, termlnallty). The details of this study will be reported in a forthcoming Hopkins Research Report. Generalized multlprocesslng systems can be considered as constrained service systems, where certain processes, the servers, are subjected to requests on behalf of others. Analytical stochastic models are devel- oped to evaluate the effect of the logical problems on the system's per- formance and effectiveness. Rather than ad hoc solutions for particular models, we propose more general mathematical techniques. Various patterns of interactions between processes are discussed and their underlying stochastic processes analyzed. Finally, the important question of resource allocation strategies is investigated in the general context of multiprocesslng systems and some of the issues are clarified. It is shown that for unrestricted models, neither the queue discipline (order of service) nor the service discipline (quantum size) affect performance and effectiveness measures, for arbitrary arrlval and service processes, while they play an important part in restricted models. SIMULTANEOUS EXECUTION OF INSTRUCTIONS A machine can be modeled as consisting of a set of "storage resources and a set of "transformational" resourcesq Instructions are considered to be requests for certain subsets of these sets of resources. Instructions are modeled abstractly with binary vectors, and an equation for calculating from these vectors a binary precedence matrix for the ordering of execution of a set of instructions is derived. A paper submitted to the June 1972 "Workshop on Parallel Computation" discusses the generalized notlon of an "Ordering Matrix" for control of the parallel execution of the instructions of a task (see the forthcoming Page 7 - 27 - report). The main result is an algorithm for the parallel execution of a task in which inter-cycle independencies are detected. A report to be issued this summer will present three main new results. The concept of "shadow - effects", which is a generalization of the notion of open-effects is discussed. It is shown that a pentary ordering matrix can represent shadow-effects, and that this ordering matrix can be calculated In a manner similar to that used for the ternary matrix of the attached abstract. Dynamic assignment of "shadow" resources can be cont~olled from this pentary ordering matrix. The concept O f "levels" is formalized and an algorithm for derivlnE successively higher lev~l representations of a task from a given lower level representation is preseqted. Each level is represented by a distinct "boolean vector space". This theory is used to place a bound on the dimension of the ordering matrix required to represent a task of arbitrary size. Finally, an algorithm is presented for constructing the vectors belonging to the space of a task in such a way that some of the ordering constraints placed on branch instructions can be removed. This algorithm involves making a single pass over the serially ordered instructions of a task, and it can be performed at the same time as the levels of the task are developed (during assembly). Results of simulating this algorithm and the level construction algorithms to determine their effect on the parallelism potentially detectable in several sample programs will also be given. P a g e 3 - $@ - JHCR #9 : "Microprogramming: An Introduction and a Viewpoint", M.J.Flynn & R.F.Rosin. ABSTRACT: The two broad aspects of microprogramming that are addressed in this issue are: microprogramming as a technological tool used to define and establish system control, and the application of micro- programming in the effective realization of computer systems. As a technological tool, three areas seem especially significant in the control of a system: s~multaneous internal resource management, the concept of residual control, and functional extensions of logic in storage. The set of current application areas for microprogramming are many and varied, including the realization of computers and special devices, the emulation of earlier computers and operating systems, the support for user-oriented systems, system maintenance, and the enhancement of system performance. JHCR #I0: "Pipelining of Arithmetic Functions" by M. J. Flynn and T. Hallin. ABSTRACT: Two addition and three multiplication algorithms were studied t~ see the effect of pipelining on system efficiency. A definition of efficiency was derived to compare the relative merits of various algorithms and implementations for addition and multiplica- tion. This definition isbasically defined as bandwidth/cost. Previous comparisons of adders and multipliers have generally been based on latency. In a pipeline environment, latency (or its inverse bandwidth) is not as important. Any bandwidth is possible up to the physical limitations on gate delay variations and pulse skew. The formal defini- tion for efficiency is: N Efficiency = D • G where N is the number of bits in the operands, D is the delay (uniform) of each pipeline stage in units of gate delays and G is the total number of gates, including any used for latching. In cases where gate variations and pulse skewing are well defined pipelining using the Earle latch results in increased efficiency. The most efficient adder is a maximally pipelined conditional-sum adder (3 stages with a delay of 4 gates per stage). Its efficiency is 6.30x10 -3. The most efficient multiplier is a maximally pipelined tree multiplier (8 stages with a delay of 4 gates per stage). Its efficiency is 3.48x10 ~4 . JHCR #ii: "Dynamic Microprogramming Erocessor Organization and Programming" by M.J. Flynn & A.B.Tucker. ABSTgACT: A dynamically microprograr~ned processor is characterized by a small (4 k 64-bit word)°read-write "micro" storage. The access time of this storage is similar to the cycle time of the machine (50-100 nsec). This microstorage is used to contain both data and subroutines. The (micro) instructions insuch a processor differ from the conventional in that they perform only purely combinatorial operations; sequencing is under the control of the microinstruction. The presence of the read-write microstorage permits a more flexible assignment of resources than the read,only storage. In particular, the processor developed in this paper stresses the simultaneous operation (within the micro- instructiofi) of the adder, shifter, masker, and testing facilities of the processor. A m i c r o a s s e m b l y l a n g u a g e i s d e v e l o p e d and t h e o v e r h e a d i n v o l v e d i n s u b - Page 4 31- routine linkages is analyzed. The efficiency of a flexible software linkage scheme Js examined as to its overhead for Various subroutine characteristics. Finally, three examples of problem-oriented programming are considered and the resulting coding is compared against a System/360 assembly language version, with the technology normalized. JHCR #12: "Some Computer Organizations and Their Effectiveness" by M. J. Flynn. ABSTRACT: A hierarchical model of computer organizations is developed, based on a tree model using request/service type resources as nodes. Two aspects of the model are distinguished: logical and physical. General parallel or multiple stream organizations are examine4 as to type and effectiveness - especially as to intrinsic logical dlfficul ~ ties. The overlapped simplex processor (SISD) is limited by data dependencies. Branching has a particularly degenerative effect. The parallel processors (single instruction stream- multiple data stream - SIMD) are analyzed. In particular, a nesting type explana- tion is offered for Minsky's conjecture - the performance of a parallel processor increases as log M instead of M (the number of data stream/processors). Multiprocessors (MIMD) are subjected to a saturation syndrome based on general communications lockout. Simplified queuing models indicate that saturation develops when the fraction of task time spent locked out (L/E) approaches ~ (n, the number of ~rocessors), Resources sharing in multiprocessors can be used to avoid several other classic organiza- tional problems. JHCP #13: "Annual Progress Report 1970-71 -Studies in Computer Organization". JHCR #14: "Modeling Generalized Parallel Computer Systems" by R. Regis. JHCR #15: "A Mathematical Model of Assignment For Realizing Modular Sequential Logic Networks" by S. P. Kartashev. JHCR #16: "Computer Resources,- A Preliminary Study" by G. S. TJaden. JHCR #17: "Theory of P-Multlple Regular Sequential Networks and its Application for Integrated Circuits I" by S. P. Kartashev. ABSTRACT: P a g e 5 - 32- This paper presents a new approach to the synthesis of sequential machines through inteKrated modules. ~he basic tools employed here are a concept of splitting shift register sequences to smaller ones and how This splitting affects next-state functions. The following problem has been solved: How does one find a proper state-assi@Dment which enables the set g ;, , . = (Fi, ..., F n) of excitation functions to be divided into p dlsjoint a I +a 2 + ... +a =n SUch That The following substituticn @ on each of the subsets can be given: for any loEical functiuns F i,[ 5 ¢ ~ where I~I z a s such a number • S . 9 8 ' k 5. % ex i s t s That % (F i) = Fj, where % : ~(@k_l ). ThUS if k = as, Then ~as(F i) -- F i. Hence any pair of functions F i (s= i, ..., p) is structure-invariant. That is a logical circuit realizing F i can be utilized for ~eallzing Fj by feeding, some permutaticn ~ of variables from The input F i. This capacity permits one to use a s copies of one inte@~ted mask in order to realize a11 functions: from The set ~s (s=l, ,.., p). In order to realize all functions from The set ~ it is necessary to have p integrated masks, each having al oopies ( i = 1, . . . , p).