Computer Memory System, Lecture notes of Architecture

Download Computer Memory System and more Lecture notes Architecture in PDF only on Docsity! Computer Architecture أ.إبتسام أبكر lecture No (3) sem7 علوم حاسوب Page 1 of 8 Computer Memory System Contents of Lecture:  Computer Memory System Overview  Characteristics of Memory Systems  The Memory Hierarchy  Cache Memory Principles References for This Lecture:  William Stallings, Computer Organization and Architecture Designing For Performance, 9th Edition, Chapter 4 : Cache Memory , pages 112 to 123 Characteristics of Memory Systems:  The complex subject of computer memory is made more manageable if we classify memory systems according to their key characteristics.  The most important of these are listed in following Table ( Table 4.1). Computer Architecture أ.إبتسام أبكر lecture No (3) sem7 علوم حاسوب Page 2 of 8  Location  Location refers to whether memory is internal and external to the computer.  Internal memory:  internal memory is often equated with main memory.  The processor requires its own local memory, in the form of registers  The control unit portion of the processor may also require its own internal memory.  Cache is another form of internal memory.  External memory consists of peripheral storage devices, such as disk and tape, that are accessible to the processor via I/O controllers.  Capacity  For internal memory, this is typically expressed in terms of bytes (1 byte = 8 bits) or words. Common word lengths are 8, 16, and 32 bits.  External memory capacity is typically expressed in terms of bytes.  Unit of transfer  For internal memory, the unit of transfer is equal to the number of electrical lines into and out of the memory Module. This may be equal to the word length, but is often larger, such as 64, 128, or 256 bits.  For main memory, this is the number of bits read out of or written into memory at a time. The unit of transfer need not equal a word or an addressable unit.  For external memory, data are often transferred in much larger units than a word, and these are referred to as blocks.  Access Methods  Sequential access:  Start at the beginning and read through in order  Access time depends on location of data and previous location  The time to access an arbitrary record is highly variable (need high space to store data).  e.g. tape  Direct access:  Individual blocks have unique address  Access is by jumping to vicinity plus sequential search  Access time depends on location and previous location  e.g. disk Computer Architecture أ.إبتسام أبكر lecture No (3) sem7 علوم حاسوب Page 5 of 8  Memory Hierarchy – Diagram:  During the course of the execution of a program, memory references tend to cluster.  e.g: In Loops or subroutine there are repeated references to a small set of instructions.  Accordingly, it is possible to organize data across the hierarchy such that the percentage of accesses to each successively lower level is less than that of the level above.  Hierarchy List:  Registers  Cache  Main memory  Disk  Optical  Tape Cache Memory Principles:  Cache memory is designed to combine the memory access time of expensive, highspeed memory combined with the large memory size of less expensive, lower-speed memory.  Small amount of fast memory  Sits between main memory and CPU  Used to hold segments of program and data of the main memory.  May be located on CPU chip or module  It is transparent to the programmers. Computer Architecture أ.إبتسام أبكر lecture No (3) sem7 علوم حاسوب Page 6 of 8  Multi-level cache:  L2 cache is slower and typically larger than the L1 cache,  L3 cache is slower and typically larger than the L2 cache. cache/main-memory structure: Computer Architecture أ.إبتسام أبكر lecture No (3) sem7 علوم حاسوب Page 7 of 8  A bove Figure (Figure 4.4) depicts the structure of a cache/main-memory system:  Main memory consists of up to 2௡ addressable words, with each word having a unique n-bit address.  For mapping purposes, this memory is considered to consist of a number of fixed- length blocks of K words each.  That is, there are M = 2௡ /K blocks in main memory.  The cache consists of m blocks, called lines. Each line contains K words, plus a tag of a few bits.  The line size may be as small as 32 bits, with each “word” being a single byte; in this case the line size is 4 bytes.  The number of lines is less than the number of main memory blocks (m << M).  At any time, some subset of the blocks of memory resides in lines in the cache.  If a word in a block of memory is read, that block is transferred to one of the lines of the cache. Because there are more blocks than lines, an individual line cannot be uniquely and permanently dedicated to a particular block.  Thus, each line includes a tag that identifies which particular block is currently being stored.  The tag is usually a portion of the main memory address, as described later in this section.  Cache Read operation:  CPU requests contents of memory location  Check cache for this data  If present (called a cache hit), get from cache (fast).  If not present (called a cache miss) , read required block from main memory to cache.(slow)  Then deliver from cache to CPU  Cache includes tags to identify which block of main memory is in each cache slot