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Fundamentals of Power Electronics: Chapter 9 - Controller Design, Slides of Electrical Engineering

A portion of a textbook chapter on power electronics, focusing on controller design. It covers topics such as switching converter, disturbances, control input, negative feedback, and small-signal model. It also includes examples and formulas for calculating loop gain, phase margin, and crossover frequency.

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2012/2013

Uploaded on 03/23/2013

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Download Fundamentals of Power Electronics: Chapter 9 - Controller Design and more Slides Electrical Engineering in PDF only on Docsity! Fundamentals of Power Electronics Chapter 9: Controller design1 Chapter 9. Controller Design 9.1. Introduction 9.2. Effect of negative feedback on the network transfer functions 9.2.1. Feedback reduces the transfer function from disturbances to the output 9.2.2. Feedback causes the transfer function from the reference input to the output to be insensitive to variations in the gains in the forward path of the loop 9.3. Construction of the important quantities 1/(1+T) and T/(1+T) and the closed-loop transfer functions Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design2 Controller design 9.4. Stability 9.4.1. The phase margin test 9.4.2. The relation between phase margin and closed-loop damping factor 9.4.3. Transient response vs. damping factor 9.5. Regulator design 9.5.1. Lead (PD) compensator 9.5.2. Lag (PI) compensator 9.5.3. Combined (PID) compensator 9.5.4. Design example Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design5 The dc regulator application Objective: maintain constant output voltage v(t) = V, in spite of disturbances in vg(t) and iload(t). Typical variation in vg(t): 100Hz or 120Hz ripple, produced by rectifier circuit. Load current variations: a significant step-change in load current, such as from 50% to 100% of rated value, may be applied. A typical output voltage regulation specification: 5V ± 0.1V. Circuit elements are constructed to some specified tolerance. In high volume manufacturing of converters, all output voltages must meet specifications. v(t) vg(t) iload(t) d(t) Switching converter Disturbances Control input } } v(t) = f(vg, iload, d ) Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design6 The dc regulator application So we cannot expect to set the duty cycle to a single value, and obtain a given constant output voltage under all conditions. Negative feedback: build a circuit that automatically adjusts the duty cycle as necessary, to obtain the specified output voltage with high accuracy, regardless of disturbances or component tolerances. Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design7 Negative feedback: a switching regulator system + – + v – vg Switching converterPower input Load –+ Compensator vref Reference input HvPulse-width modulator vc Transistor gate driver δ Gc(s) H(s) ve Error signal Sensor gain iload Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design10 Voltage regulator system small-signal model • Use small-signal converter model • Perturb and linearize remainder of feedback loop: vref(t) = Vref + vref(t) ve(t) = Ve + ve(t) etc. Reference input Error signal +– Pulse-width modulator Compensator Gc(s) Sensor gain H(s) 1 VM + – +– 1 : M(D) Le C Rvg(s) j(s)d(s) e(s)d(s) iload (s) + v(s) – d(s) vref (s) H(s)v(s) ve(s) vc(s) Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design11 Regulator system small-signal block diagram Reference input Error signal +– Pulse-width modulatorCompensator Sensor gain H(s) 1 VM Duty cycle variation Gc(s) Gvd(s) Gvg(s) Zout(s) ac line variation Load current variation + – + Output voltage variation Converter power stage vref (s) ve(s) vc(s) d(s) vg(s) iload(s) v(s) H(s)v(s) Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design12 Solution of block diagram v = vref GcGvd / VM 1 + HGcGvd / VM + vg Gvg 1 + HGcGvd / VM – i load Zout 1 + HGcGvd / VM Manipulate block diagram to solve for . Result isv(s) which is of the form v = vref 1 H T 1 + T + vg Gvg 1 + T – i load Zout 1 + T with T(s) = H(s) Gc(s) Gvd(s) / VM = "loop gain" Loop gain T(s) = products of the gains around the negative feedback loop. Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design15 9.2.2. Feedback causes the transfer function from the reference input to the output to be insensitive to variations in the gains in the forward path of the loop Closed-loop transfer function from to is: which is independent of the gains in the forward path of the loop. This result applies equally well to dc values: v(s)vref v(s) vref(s) vg = 0 i load = 0 = 1 H(s) T(s) 1 + T(s) If the loop gain is large in magnitude, i.e., || T || >> 1, then (1+T) ≈ T and T/(1+T) ≈ T/T = 1. The transfer function then becomes v(s) vref(s) ≈ 1 H(s) V Vref = 1 H(0) T(0) 1 + T(0) ≈ 1 H(0) Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design16 9.3. Construction of the important quantities 1/(1+T) and T/(1+T) Example T(s) = T0 1 + sωz 1 + s Qωp1 + sωp1 2 1 + sωp2 At the crossover frequency fc, || T || = 1 fp1 QdB – 40 dB/decade | T0 |dB fz fc fp2 – 20 dB/decade Crossover frequency f || T || 0 dB –20 dB –40 dB 20 dB 40 dB 60 dB 80 dB – 40 dB/decade 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design17 Approximating 1/(1+T) and T/(1+T) T 1 + T ≈ 1 for || T || >> 1 T for || T || << 1 1 1+T(s) ≈ 1 T(s) for || T || >> 1 1 for || T || << 1 Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design20 Same example: construction of 1/(1+T) 1 1+T(s) ≈ 1 T(s) for || T || >> 1 1 for || T || << 1fp1 QdB – 40 dB/decade | T0 |dB fz fc fp2 Crossover frequency || T || 0 dB –20 dB –40 dB 20 dB 40 dB 60 dB 80 dB –60 dB –80 dB f 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz QdB – | T0 |dB fp1 fz 1 1 + T – 40 dB/decade + 40 dB/decade + 20 dB/decade – 20 dB/decade Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design21 Interpretation: how the loop rejects disturbances Below the crossover frequency: f < fc and || T || > 1 Then 1/(1+T) ≈ 1/T, and disturbances are reduced in magnitude by 1/ || T || Above the crossover frequency: f > fc and || T || < 1 Then 1/(1+T) ≈ 1, and the feedback loop has essentially no effect on disturbances 1 1+T(s) ≈ 1 T(s) for || T || >> 1 1 for || T || << 1 Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design22 Terminology: open-loop vs. closed-loop Original transfer functions, before introduction of feedback (“open-loop transfer functions”): Upon introduction of feedback, these transfer functions become (“closed-loop transfer functions”): The loop gain: Gvd(s) Gvg(s) Zout(s) 1 H(s) T(s) 1 + T(s) Gvg(s) 1 + T(s) Zout(s) 1 + T(s) T(s) Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design25 9.4.1. The phase margin test A test on T(s), to determine whether 1/(1+T(s)) contains RHP poles. The crossover frequency fc is defined as the frequency where || T(j2πfc) || = 1 ⇒ 0dB The phase margin ϕm is determined from the phase of T(s) at fc , as follows: ϕm = 180˚ + ∠T(j2πfc) If there is exactly one crossover frequency, and if T(s) contains no RHP poles, then the quantities T(s)/(1+T(s)) and 1/(1+T(s)) contain no RHP poles whenever the phase margin ϕm is positive. Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design26 Example: a loop gain leading to a stable closed-loop system ∠T(j2πfc) = – 112˚ ϕm = 180˚ – 112˚ = + 68˚ fc Crossover frequency 0 dB –20 dB –40 dB 20 dB 40 dB 60 dB f fp1 fz || T || 0˚ –90˚ –180˚ –270˚ ϕm ∠ T ∠ T|| T || 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design27 Example: a loop gain leading to an unstable closed-loop system ∠T(j2πfc) = – 230˚ ϕm = 180˚ – 230˚ = – 50˚ fc Crossover frequency 0 dB –20 dB –40 dB 20 dB 40 dB 60 dB f fp1 fp2 || T || 0˚ –90˚ –180˚ –270˚ ∠ T ∠ T|| T || ϕm (< 0) 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design30 Closed-loop response T(s) = 1s ω0 1 + s ω2 T(s) 1 + T(s) = 1 1 + 1 T(s) = 1 1 + sω0 + s2 ω0ω2 T(s) 1 + T(s) = 1 1 + s Qωc + sωc 2 If Then or, where ωc = ω0ω2 = 2π fc Q = ω0 ωc = ω0 ω2 Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design31 Low-Q case Q = ω0 ωc = ω0 ω2 Q ωc = ω0 ωc Q = ω2 low-Q approximation: 0 dB –20 dB –40 dB 20 dB 40 dB f || T || f0 f2 f0 f f0 f2 f 2 – 20 dB/decade – 40 dB/decade T 1 + T fc = f0 f2 Q = f0 / fc Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design32 High-Q case ωc = ω0ω2 = 2π fc Q = ω0 ωc = ω0 ω2 f || T || f0 f2 f0 f f0 f2 f 2 – 20 dB/decade – 40 dB/decade T 1 + T fc = f0 f2 Q = f0/fc 0 dB –20 dB –40 dB 20 dB 40 dB 60 dB Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design35 9.4.3. Transient response vs. damping factor Unit-step response of second-order system T(s)/(1+T(s)) v(t) = 1 + 2Q e -ωct/2Q 4Q2 – 1 sin 4Q2 – 1 2Q ωc t + tan-1 4Q 2 – 1 v(t) = 1 – ω2 ω2 – ω1 e –ω1t – ω1 ω1 – ω2 e –ω2t ω1, ω2 = ωc 2Q 1 ± 1 – 4Q2 Q > 0.5 Q < 0.5 peak v(t) = 1 + e– π / 4Q2 – 1 For Q > 0.5 , the peak value is Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design36 Transient response vs. damping factor 0 0.5 1 1.5 2 0 5 10 15 ωct, radians Q = 10 Q = 50 Q = 4 Q = 2 Q = 1 Q = 0.75 Q = 0.5 Q = 0.3 Q = 0.2 Q = 0.1 Q = 0.05 Q = 0.01 v(t) Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design37 9.5. Regulator design Typical specifications: • Effect of load current variations on output voltage regulation This is a limit on the maximum allowable output impedance • Effect of input voltage variations on the output voltage regulation This limits the maximum allowable line-to-output transfer function • Transient response time This requires a sufficiently high crossover frequency • Overshoot and ringing An adequate phase margin must be obtained The regulator design problem: add compensator network Gc(s) to modify T(s) such that all specifications are met. Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design40 Lead compensator design To optimally obtain a compensator phase lead of θ at frequency fc, the pole and zero frequencies should be chosen as follows: fz = fc 1 – sin θ 1 + sin θ fp = fc 1 + sin θ 1 – sin θ If it is desired that the magnitude of the compensator gain at fc be unity, then Gc0 should be chosen as Gc0 = fz fp f || Gc || ∠ Gc Gc0 0˚ fp fz /10 fp/10 10fz fϕmax = fz fp + 45˚/decade – 45˚/decade fz Gc0 fp fz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design41 Example: lead compensation f || T || 0˚ –90˚ –180˚ –270˚ ∠ T || T || ∠ T T0 f0 0˚ fz fc ϕm T0 Gc0 Original gain Compensated gain Original phase asymptotes Compensated phase asymptotes 0 dB –20 dB –40 dB 20 dB 40 dB 60 dB fp Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design42 9.5.2. Lag (PI) compensation Gc(s) = Gc∞ 1 + ωL s Improves low- frequency loop gain and regulation f || Gc || ∠ Gc Gc∞ 0˚ fL/10 + 45˚/decade fL – 90˚ 10fL – 20 dB /decade Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design45 9.5.3. Combined (PID) compensator Gc(s) = Gcm 1 + ωL s 1 + s ωz 1 + sωp1 1 + sωp2 0 dB –20 dB –40 dB 20 dB 40 dB f || Gc || ∠ Gc || Gc || ∠ Gc Gcm fz – 90˚ fp1 90˚ 0˚ –90˚ –180˚ fz /10 fp1/10 10 fz fL fc fL /10 10 fL 90˚/decade 45˚/decade – 90˚/decade fp2 fp2 /10 10 fp1 Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design46 9.5.4. Design example + – + v(t) – vg(t) 28 V –+ Compensator HvPulse-width modulator vc Transistor gate driver δ Gc(s) H(s) ve Error signal Sensor gain iload L 50 µH C 500 µF R 3 Ω fs = 100 kHz VM = 4 V vref 5 V Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design47 Quiescent operating point Input voltage Vg = 28V Output V = 15V, Iload = 5A, R = 3Ω Quiescent duty cycle D = 15/28 = 0.536 Reference voltage Vref = 5V Quiescent value of control voltage Vc = DVM = 2.14V Gain H(s) H = Vref/V = 5/15 = 1/3 Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design50 Open-loop line-to-output transfer function and output impedance Gvg(s) = D 1 1 + s LR + s 2LC Gvg(s) = Gg0 1 1 + s Q0ω0 + sω0 2 Zout(s) = R || 1 sC || sL = sL 1 + s LR + s 2LC —same poles as control-to-output transfer function standard form: Output impedance: Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design51 System block diagram T(s) = Gc(s) 1 VM Gvd(s) H(s) T(s) = Gc(s) H(s) VM V D 1 1 + s Q0ω0 + sω0 2 +– H(s) 1 VM Duty cycle variation Gc(s) Gvd (s) Gvg(s) Zout (s) ac line variation Load current variation + –+ Converter power stage T(s) VM = 4 V H = 1 3 v(s)d(s) vg(s) vc(s)ve(s) iload (s) vref ( = 0 ) Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design52 Uncompensated loop gain (with Gc = 1) With Gc = 1, the loop gain is Tu(s) = Tu0 1 1 + s Q0ω0 + sω0 2 Tu0 = H V D VM = 2.33 ⇒ 7.4dB fc = 1.8 kHz, ϕm = 5˚ 0 dB –20 dB –40 dB 20 dB 40 dB f || Tu || 0˚ –90˚ –180˚ –270˚ ∠ Tu || Tu || ∠ Tu Tu0 2.33 ⇒ 7.4 dB f0 1 kHz 0˚ 10 – 12Q f0 = 900 Hz 10 1 2Q f0 = 1.1 kHz Q0 = 9.5 ⇒ 19.5 dB – 40 dB/decade 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design55 Loop gain, with lead compensator T(s) = Tu0 Gc0 1 + sωz 1 + sωp 1 + s Q0ω0 + sω0 2 0 dB –20 dB –40 dB 20 dB 40 dB f || T || 0˚ –90˚ –180˚ –270˚ ∠ T || T || ∠ T T0 = 8.6 ⇒ 18.7 dB f0 1 kHz 0˚ Q0 = 9.5 ⇒ 19.5 dB fz fp 1.7 kHz 14 kHz fc 5 kHz 170 Hz 1.1 kHz 1.4 kHz 900 Hz 17 kHz ϕm=52˚ 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design56 1/(1+T), with lead compensator • need more low-frequency loop gain • hence, add inverted zero (PID controller) 0 dB –20 dB –40 dB 20 dB 40 dB f || T || T0 = 8.6 ⇒ 18.7 dB f0 Q0 = 9.5 ⇒ 19.5 dB fz fp fc Q0 1/T0 = 0.12 ⇒ – 18.7 dB 1 1 + T 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design57 Improved compensator (PID) Gc(s) = Gcm 1 + sωz 1 + ωL s 1 + sωp • add inverted zero to PD compensator, without changing dc gain or corner frequencies • choose fL to be fc/10, so that phase margin is unchanged 0 dB –20 dB –40 dB 20 dB 40 dB f || Gc || ∠ Gc || Gc || ∠ Gc Gcm fz – 90˚ fp 90˚ 0˚ –90˚ –180˚ fz /10 fp /10 10 fz fL fc fL /10 10 fL 90˚/decade 45˚/decade – 45˚/dec 1 Hz 10 Hz 100 Hz 1 kHz 10 kHz 100 kHz Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design72 9.7. Summary of key points 1. Negative feedback causes the system output to closely follow the reference input, according to the gain 1/H(s). The influence on the output of disturbances and variation of gains in the forward path is reduced. 2. The loop gain T(s) is equal to the products of the gains in the forward and feedback paths. The loop gain is a measure of how well the feedback system works: a large loop gain leads to better regulation of the output. The crossover frequency fc is the frequency at which the loop gain T has unity magnitude, and is a measure of the bandwidth of the control system. Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design73 Summary of key points 3. The introduction of feedback causes the transfer functions from disturbances to the output to be multiplied by the factor 1/(1+T(s)). At frequencies where T is large in magnitude (i.e., below the crossover frequency), this factor is approximately equal to 1/T(s). Hence, the influence of low-frequency disturbances on the output is reduced by a factor of 1/T(s). At frequencies where T is small in magnitude (i.e., above the crossover frequency), the factor is approximately equal to 1. The feedback loop then has no effect. Closed-loop disturbance-to- output transfer functions, such as the line-to-output transfer function or the output impedance, can easily be constructed using the algebra-on- the-graph method. 4. Stability can be assessed using the phase margin test. The phase of T is evaluated at the crossover frequency, and the stability of the important closed-loop quantities T/(1+T) and 1/(1+T) is then deduced. Inadequate phase margin leads to ringing and overshoot in the system transient response, and peaking in the closed-loop transfer functions. Docsity.com Fundamentals of Power Electronics Chapter 9: Controller design74 Summary of key points 5. Compensators are added in the forward paths of feedback loops to shape the loop gain, such that desired performance is obtained. Lead compensators, or PD controllers, are added to improve the phase margin and extend the control system bandwidth. PI controllers are used to increase the low-frequency loop gain, to improve the rejection of low-frequency disturbances and reduce the steady-state error. 6. Loop gains can be experimentally measured by use of voltage or current injection. This approach avoids the problem of establishing the correct quiescent operating conditions in the system, a common difficulty in systems having a large dc loop gain. An injection point must be found where interstage loading is not significant. Unstable loop gains can also be measured. Docsity.com
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