Download Examinations Document for Electronic Engineering Students - Semester I, 2008 and more Exams Digital & Analog Electronics in PDF only on Docsity! Semester I Examinations 2008 Exam Code(s) 3BN1, 3BP1, Exam(s) Third Year Electronic Engineering Third Year Electronic & Computer Engineering Module Code(s) EE321 Module(s) Analogue Systems Design II Paper No. Repeat Paper External Examiner(s) Professor G. Irwin Internal Examiner(s) Prof. G. Ó Laighin Dr. P. Corcoran Instructions : Answer any three questions from four All questions carry equal marks (20 marks) Duration: 2 hrs No. of Pages 6 Department(s) Electronic Engineering Course Coordinator(s) Requirements: MCQ Handout Statistical Tables Graph Paper Log Graph Paper Other Material Page 1 of 6 Attempt 3 questions only – 20 marks per question. (NB: Any roughwork and calculations must be included with your exam script.) Q 1. (a) Two types of amplifier are available to a design engineer as shown in Figure 1(a). The first amplifier has input impedance of 100 ohm, amplifier voltage gain of 10 and an output impedance of 1000 ohm. The second amplifier has corresponding values of Ri = 1000 ohm, Ag = 3 and Ro = 100 ohm. Calculate the voltage gain when two of the type I amplifier are arranged in a twostage amplifier cascade. Similarly calculate the voltage gain when two of the type II amplifier are cascaded. Which combined amplifier has better performance? [4 marks] (b) The twostage amplifiers from part (a) are to be connected into a currentgain output stage as shown in Figure 1(b). Calculate the voltage gain of the combined voltage gain and current gain stages. Which combination has better voltage gain – the dual type I amplifier stage combined with the type III current gain output stage or the dual type II combined with type III output stage? Explain why this is the case. [3 marks] (c) Design a commonemitter transistor amplifier for AC signals with a singlesided power supply of 20V. The 3dB frequency is 100 Hz and the gain should be 100 at the quiescent point. The quiescent collector current should be 0.5 mA. Sketch your circuit design and provide explanations and calculations for each of the circuit elements, R1, R2, C1, C2, RC, RE and R3. You may assume a minimum current gain for the transistor of 100 and VT = 25 mA. [8 marks] (d) What is the gain of your amplifier when the output voltage swings from the quiescent point: (i) up to +15V; (ii) down to +5V? What is the (iii) input impedance and (iv) the output impedance of your amplifier. If you wanted to reduce the variability in amplifier gain demonstrated by results (i) and (ii) how could you achieve this? How would this affect the overall amplifier gain? [5 marks] 1 0 0 A g = 1 0 1 0 0 0 1 0 0 0 A g = 3 1 0 0 A m p l i f i e r t y p e I A m p l i f i e r t y p e I I 1 0 0 0 A g = 1 1 0 0 A m p l i f i e r t y p e I I I Figure 1(a): Voltage Amplifier Building Blocks Figure 1(b): Current Amplifier Output Stage Page 2 of 6 +12
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Figure 3(c): Improved Two-Transistor CE (Cascode) Amplifier
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Q4. (a) Given +12V/12V symmetric power supply, design a Schmitt trigger circuit with asymmetric switching voltages at 2.5V and 5V? No other power supply is available so you must include a resistor network to set the required reference voltage. You may assume that the opamp output can swing within 0.5V of the power rails. [5 marks] (b) Convert your Schmitt trigger design into an astable multivibrator with an asymmetric period of 200 uS. Suggest how you could adapt this multivibrator design to have a symmetric period with identical rise and fall times of 100 uS? [5 marks] (c) Show how an opamp can be configured as (i) a logarithmic amplifier and (ii) an exponential amplifier. Derive expressions for the amplifier gain in each case. Explain, giving some examples, how these amplifiers may be used in practical circuit applications. Finally, explain what functionality is realized by Figure 4 below. [5 marks] (d) Design an analog circuit, using opamps, to divide one input signal, X by a second input signal, Y. Explain how your design achieves this voltage division functionality, explaining the functionality of each of the independent circuit blocks. Discuss, in the context of a practical log amplifier circuit, some of the limitations of this circuit. [5 marks] Figure 4: Mixed Exponential/Logarithmic Amplifier Circuit using OpAmps Page 6 of 6