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University of California Berkeley EECS105 Microelectronic Devices and Circuits Final Exam, Exams of Microeconomics

The final exam for the microelectronic devices and circuits course (eecs105) at the university of california berkeley for the fall semester of 1999. The exam covers topics such as mos devices, bipolar transistors, current mirrors, and small signal models. It includes four problems with multiple parts, each worth a certain number of points. The exam also provides device data and specific values for certain parameters.

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2012/2013

Uploaded on 03/22/2013

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Download University of California Berkeley EECS105 Microelectronic Devices and Circuits Final Exam and more Exams Microeconomics in PDF only on Docsity! EECS105 1 of 15 Fall 1999 Microelectronic Devices and Circuits- EECS105 Final Exam Wednesday, December 8, 1999 Costas J. Spanos University of California at Berkeley College of Engineering Department of Electrical Engineering and Computer Sciences Your Name: ____________________________________________ (last) (first) Your Signature: __________________________________________ 1. Print and sign your name on this page before you start. 2. You are allowed three, 8.5”x11” handwritten sheets. No books or notes! 3. Do everything on this exam, and make your methods as clear as possible. Problem 1 ________ / 24 Problem 2 ________ / 28 Problem 3 ________ / 24 Problem 4 ________ / 24 TOTAL _________ / 100 MOS Device Data (you may not have to use all of these...) µnCox = 50µA/V 2, µpCox = 25µA/V 2, VTn = -VTp = 1V, Lmin = 2µm. VBS = 0. λn = λp = 0.1V −1 when L = 2µm, and it is otherwise proportional to 1/L Cox = 2.3fF/µm 2, Cjn = 0.1fF/µm 2, Cjp = 0.3fF/µm 2, Cjswn = 0.5fF/µm, Cjswp = 0.35fF/µm, Covn = 0.5fF/µm, Covp = 0.5fF/µm npn Data IS = 10 -17A, β = 100, VA = 25V, τF = 50ps, Cje = 15fF, Cµ = 10fF pnp Data IS = 10 -17A, β = 50, VA = 25V, τF = 50ps, Cje = 15fF, Cµ = 10fF EECS105 2 of 15 Fall 1999 Problem 1 of 4: Answer each question briefly and clearly. (4 points each, total 24) Mark in the table below the npn Bipolar Transistor in forward action mode the direction of flow, and the type of flow (drift or diffusion) of electrons, in each of the bulk and depletion regions. Where is the maximum |E| field in a forward-biased junction? Please place a mark on the graph below. What happens to the drain current of an n-channel MOS transistor in saturation, when L and W increase proportionally? (i.e. L and W increase, but W/L stays constant. Assume that VGS, VBS and VDS stay constant. Do take λ into account!) E B C BE junction BC junction depletion depletion n p n drift diffusion n n junction depletion p-type n-type p n (place a mark at the appropriate box to indicate your answer. You can choose more than one box if appropriate.) EECS105 5 of 15 Fall 1999 c) Draw the small signal model for this amplifier, and calculate the values of gm and ro for this tran- sistor (4 points). d) Draw the 2-port model for this circuit as a voltage amplifier and calculate the values of Av, Rin and Rout. (4 points) Parameter Expression Value Av Rin Rout gm = ro = EECS105 6 of 15 Fall 1999 e) In an attempt to increase the Av of this amp, we redesign it with a “real” biasing circuit as shown below. Calculate the value of the reference resistor and the W/L of the biasing transistors so that Isupply = 250µA and VBIAS = 3.5V. For this part do not take λ into account, and assume that the W/L of the amplifying transistor M1 is 160/2. (this is not the same value as the one you found in part a). Make it so that all three branches have the same current of 250µA. (4 points) Transistor W/L M1 160/2 M2 /2 M3 /2 M4 /2 M5 /2 Resistor Value in Ω R M1 M2 M3 M4M5 R Isupply VBIAS vout 5V 0V EECS105 7 of 15 Fall 1999 f) What is the Rin, Av and Rout of the new design? (4 points) g) What is the minimum and the maximum output voltage of the new design? Make sure you mention the limiting reason for each case (i.e. transistor X falls out of saturation, or current source Y hits its minimum voltage drop, etc.). (4 points) Parameter Expression Value Av Rin Rout MAX Vout = MIN Vout = MAX Limited by: MIN Limited by: EECS105 10 of 15 Fall 1999 c) Draw the overall voltage amp 2-port for the entire amp (i.e. draw one 2-port that represents the entire 2-stage amp), and derive expressions for the Av, Rin, Rout, as well as vout / vs in terms of the device parameters, and roc1, roc2, Rs and RL, as needed. (6 points) Parameter Expression Rin Rout Av vout/vs EECS105 11 of 15 Fall 1999 d) Assume that VBIAS = 1.5V, and that the minimum voltage across the current sources is 0.5V. Find the maximum and minimum voltages at the drain of M1 and at the emitter of M2. Make sure you mention the limiting reason for each case (i.e. transistor X falls out of saturation, or current source Y hits its minimum voltage drop, etc.) (6 points) Node Min Voltage Reason for Min Voltage Max Voltage Reason for Max Voltage drain of M1 emitter of M2 EECS105 12 of 15 Fall 1999 Problem 4/4 (24 points) The following is the 2-port representation of a voltage amplifier, where the “Miller” elements Cµ and Rµ have been added as shown. Av = -100, Rs = 5kΩ, Rin = 5kΩ, Rout = 5kΩ, RL = 5kΩ, Cµ = 0.4pF, Rµ = 100kΩ. Miller Approximation Refresher: Note that the Miller approximation applies to any kind of complex impedance connected between the nodes that exhibit voltage gain Av. In general, ZM = Zµ/(1-Av). (Here a bold symbol indicates a complex number). As you know, for capacitors, Zµ = 1/jωCµ, so it turns out that CM = Cµ(1- Av). Below you will be asked to apply the Miller approximation for capacitors, as well as for resistors.... + - Rin Rout RL Rµ Cµ + - Rs vs vin Avvin vout + - + - Zµ ZΜ V1 V2 V1 V2 Av=V2/V1 Miller approximation refresher: these two circuits are almost equivalent. ZM = Zµ/(1-Av)
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