Download diffusion current - Electronics - Exam and more Exams Electronics in PDF only on Docsity! Cork Institute of Technology Higher Certificate in Engineering in Electronic Engineering – Stage 1 (National Certificate in Engineering in Electronic Engineering – Stage 1) (NFQ – Level 6) Autumn 2005 ELECTRONICS (Time: 3 Hours) Answer Question 1 [40 marks] and any three other questions [each 20 marks] Examiners: Mr. M. O’Gorman Mr. D. O’Mahony Mr. J. Berry Dr. R. O Dubhghaill 1. (a) Briefly distinguish between avalanche breakdown and zener breakdown in a reverse-biased pn-junction. [5 marks] (b) What is meant by donor doping and acceptor doping? Explain how the conductivity of a semiconductor material may be improved by either of the above processes. [5 marks] (c) Show how the maximum power dissipation curve for a transistor may be drawn on the transistor’s output characteristics. Illustrate the direction of curve displacement if the ambient operating temperature of the device is to be increased. [5 marks] (d) Outline briefly the difference between drift current and diffusion current. [5 marks] (e) Explain why the depletion region is wedge shaped in a JFET that is carrying drain current. [5 marks] (f) Explain why the output voltage of a common emitter transistor amplifier is 180° out of phase with the input voltage. [5 marks] (g) Explain what is meant by the frequency response of an amplifier. Outline the characteristics of an amplifier which may be ascertained from the plot of such a response. [5 marks] (h) Explain the term dynamic resistance when applied to a forward-biased diode. [5 marks] 2 2. The output characteristics of an NPN transistor are tabulated below, and are assumed to be linear over the given range: BASE CURRENT COLLECTOR CURRENT mA( ) FOR COLLECTOR VOLTAGES OF, µA( ) 1 V 10 V 20 1.15 1.40 50 3.15 4.05 80 6.00 8.00 The transistor, which has an ac input resistance of 950Ω , is to be used in the common emitter mode with a resistive load of 1.25kΩ and a supply voltage of 10V. (a) Plot the output characteristics and draw the load-line on graph paper. [8 marks] (b) Calculate the ac current gain and voltage gain when a 60µA peak-to-peak input current varies sinusoidally about a mean value of 50µA . [8 marks] (c) State how a reduction in load resistance would affect the ac voltage gain. [4 marks] 3. (a) With the aid of sketches, describe the principle of operation of an n–channel junction field– effect transistor (JFET). [12 marks] (b) Sketch typical drain characteristic curves. [4 marks] (c) State an expression relating the drain current ( ID ) to the gate–source voltage (VGS) for a JFET operating in the pinch–off region. Explain each term in the expression. [4 marks] 4. (a) A zener diode has a reverse breakdown voltage of 9.1V and after this may be considered a linear resistance of 18Ω . A simple voltage stabilising circuit using the diode above is to maintain 10V across a constant 500Ω from a nominal 13.5V supply. Draw the circuit diagram and calculate the value of series resistor required. [8 marks] (b) Calculate the change in load voltage if the supply voltage is reduced by 20%. [6 marks] (c) Explain how the circuit minimises the effects of variation in the load resistance on the load voltage. [6 marks]