Drain Current - Microelectronic Devices and Circuits - Exam, Exams of Microeconomics

Download Drain Current - Microelectronic Devices and Circuits - Exam and more Exams Microeconomics in PDF only on Docsity! 1 University of California at Berkeley College of Engineering Dept. of Electrical Engineering and Computer Sciences EE 105 Final Exam Spring 2007 Prof. Ming C. Wu May 11, 2007 Guidelines • Open book, open notes. • You may use a calculator. • No cell phone or other electronic devices are allowed. • Show all your work and reasoning on the exam in order to receive full or partial credit. • The problem may contain more information than you need. Just use the conditions that you think is necessary for the solution. • Exam Time: 180 minutes 2 (1) Please answer the following questions. a) [2 pt] (Single choice) The drain current in a PMOS FET is conducted by (A) electron, (B) hole, (C) both. b) [2 pt] (Single choice) The drain current in a NMOS FET is conducted by (A) electron, (B) hole, (C) both. c) [3 pt] (Single choice) The collector current in an NPN bipolar transistor is conducted by (A) electron, (B) hole, (C) both. d) [3 pt] (Single choice) The collector current in a PNP bipolar transistor is conducted by (A) electron, (B) hole, (C) both. e) [5 pt] What is the flatband voltage of an MOS capacitor with a p-type substrate (doping = 1015 cm-3), a heavily doped p-type polysilicon gate, and a high-k dielectric with a thickness of 10 nm and a dielectric constant of 30. f) [5 pt] For an NMOS with a substrate doping of 1015 cm-3 (you have to determine the doping type yourself), a heavily doped n-type polysilicon gate, a 10-nm-thick oxide (dielectric constant = 3.9), find the voltage drop across the oxide when the NMOS is biased at the onset of inversion (i.e., at threshold). g) [5 pt] The small-signal equivalent circuit of a forward-biased P-N junction diode is a resistor. What is the resistance value when the diode is biased at 10 mA? Assume both N and P doping concentrations are 1016 cm-3. The area of the diode is 100μm x 100μm. h) [5 pt] The small-signal equivalent circuit of a reverse-biased P-N junction diode is a variable capacitor. What is the capacitance tuning ratio (i.e., the ratio of the maximum and the minimum capacitance) if the bias is varied from -1V to -10V? Assume both N and P doping concentrations are 1016 cm-3. The area of the diode is 100μm x 100μm. (2) For the bipolar amplifier shown in the following. Ignore base current for Part a) to d). a) [5 pt] What is the DC voltage at node X? b) [5 pt] Calculate the small-signal parameters (i.e., gm, rπ, r0) of Q1. c) [5 pt] What is the small-signal gain of the amplifier? d) [5 pt] What is the input resistance? e) [5 pt] If we take into account the finite base currents in Q2 and Q3, what would be the collector current in Q1? What is the percentage error introduced in Part c)? vIN vOUT Vcc = 3V Q2 IREF RL + -Q1 Q3 RE RS X CC BJT Parameters IS,3 = 10-15 A AE,3 = 10 μm2 AE,2 = 100 μm2 VA = 50V β = 100 Cπ = 20 fF Cμ = 5 fF CCS = 10 fF IREF = 100 μA RS = 1 kΩ RE = 1 kΩ RL = 100 kΩ CC = ∞ (AC short circuit)