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Three assignments from an electrical and computer engineering (ece) graduate course (598) on formal hardware/system-on-chip (soc) verification. The assignments involve modeling and verifying properties of an elevator system, a cache coherence protocol, and a security protocol using given tools and methodologies. The elevator system assignment requires modeling the system using given variables and functions, and verifying properties such as the elevator door being closed during travel and servicing pending requests. The cache coherence protocol assignment involves verifying freedom from deadlock and safety properties using the given smv model and cache.pdf description. The security protocol assignment involves checking for vulnerability to a lowe attack using the given promela description in nsl.txt.
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