Electronics Devices And Circuits (Boylestad et. al.) Chapter 4 "Transistor Biasing", Slides of Electronics

Download Electronics Devices And Circuits (Boylestad et. al.) Chapter 4 "Transistor Biasing" and more Slides Electronics in PDF only on Docsity! DOPE KL MES GM) nV Any increase in alternating current voltage, current, or power is the result of energy transfer from the applied dc supplies. la ub OULU Base-Emitter OV alm ATVGE Loop  Emitter-Bias The dc bias network includes an emitter resistor to improve the stability of the fixed- bias configuration. The more stable the configuration, the less responsive it is to unwanted changes in temperature and parameter variations. The dc bias network includes an emitter resistor to improve the stability of the fixed-bias configuration. The more stable the configuration, the less responsive it is to unwanted changes in temperature and parameter variations. Saturation The maximum collector current or collector saturation level for an emitter-bias design can be determined using the same method as for a fixed- bias configuration: Apply a short circuit between the collector-emitter terminals and calculate the resulting collector current: Load-Line The maximum collector current or collector saturation level for an emitter-bias design can be determined using the same method as for a fixed- bias configuration: Apply a short circuit between the collector-emitter terminals and calculate the resulting collector current: Voltage-Divider Bias In this picture, the voltage-diivider bias configuration is such a network. When exact basis analyzed, the beta will be quite small due to the changes into its sensitivityy. When the cicuit were properly chosen, the resulting levels of ICQ and VECQ will be almost independent of beta. 2. Approximate Method ©) eo oOtmge oe Transistor Saturation Load-Line . f a ED vn 4 * on ~ Saturation Condition Load-Line Analysis Emitter-Follower In previous sections, we discussed how the output voltage of a BJT is typically taken off the collector terminal. This section looks at the configuration in which the output is taken from the emitter. This is not the only configuration in which the output can be taken from the emitter terminal. In fact, any configuration described can be used as long as a resistor is placed in the emitter leg. Design Operations Design of a Bias Circuit with an Emitter Feedback Resistor Design of a Current-Gain Stabilized DC Biasing BJTs Section 4.12 Multiple BJT Networks Some of the most popular networks involving multiple Bipolar Junction Transistors are shown in this section. The methods of analysis introduced from previous sections will be useful. 2) Darlington Amplifier Vee FIG. 4.66 Darlington amplifier.  Bo = Bib> | Vee, — VBE, + Vee, — Veo ~ VBE, Rp t+ (Bp + IRE IR, FIG. 4.67 DC equivalent of Fig. 4.66.  FIG. 4.67 DC equivalent of Fig. 4.66.  FIG. 4.69 DC equivalent of Fig. 4.68. iG = lr, = ic = lr, VB, = VBE, Rg, + Re,  FIG. 4.69 DC equivalent of Fig. 4.68.  4) Feedback Pair FIG. 4.70 Feedback Pair amplifier.  Vec, = Ve, — Ve, FIG. 4.71 DC equivalent of Fig. 4.70.  5) Direct Coupled Amplifier R, Vec VN 200 © FIG. 4.72 Direct-coupled amplifier. 1kO €  EXAMPLE 4.26 Determine the dc levels for the currents and voltages of the direct-coupled amplifier of Fig. 4.72. Note that it is a voltage-divider bias configuration followed by a common-collector configuration; one that is excellent in cases wherein the input imped- ance of the next stage is quite low. The common-collector amplifier is acting like a buffer between stages. Rr = 33k0|/10kO = 7.67kO 10kQ(14 V) En = = 3.26V Th” 10kQ, + 33kQ FIG. 4.72 Direct-coupled amplifier.  EXAMPLE 4.26 Determine the dc levels for the currents and voltages of the direct-coupled amplifier of Fig. 4.72. Note that it is a voltage-divider bias configuration followed by a common-collector configuration; one that is excellent in cases wherein the input imped- ance of the next stage is quite low. The common-collector amplifier is acting like a buffer between stages. FIG. 4.72 Direct-coupled amplifier.  EXAMPLE 4.26 Determine the dc levels for the currents and voltages of the direct-coupled amplifier of Fig. 4.72. Note that it is a voltage-divider bias configuration followed by a common-collector configuration; one that is excellent in cases wherein the input imped- ance of the next stage is quite low. The common-collector amplifier is acting like a buffer between stages. Viep= VEE =14V Vcr, = Vo, — VE " VCE —= Veo = Vis 1 = 14V — 5.68 V oimeeenner miiier $ 32 V Current Mirrors Section 4.13 Iz = I control By I control — Vcc VBE R FIG. 4.74 Current mirror using back-to-back BJTs. EXAMPLE 4.27 Calculate the mirrored current / in the circuit of Fig. 4.76. +12 V Vcc -— V 1.1kO [= Leontrol — f ae 1! R 2 V¥ — OF V¥ — = 10.27 mA Q, Q> 1.1 kQ 7 FIG. 4.76 Current mirror circuit for Example 4.27.  EXAMPLE 4.28 Calculate the current / through each of the transistor Q2 and Q3 in the circuit of Fig. 4.77. +6 V 1 Fen \i VBE, = VBE, = VBE; then IB, = Tz, a Ip, PSKO & = [control 4 ik = qT fa Te, & 0; By an B= B wi B,; = B Q; YB Loontrol I I lB BB Current mirror circuit for Example 4.28. Current Source Circuits Section 4.14 Current Source Circuits Practical Ideal voltage source voltage source oO Practical current source Ideal current source  BJT Constant-Current Source Ver FIG. 4.81 Discrete constant-current source. EXAMPLE 4.30 Calculate the constant current / in the circuit of Fig. 4.84. Vz — Ver Ea. (4.83): /J= q. (4.83) R, 97kQ 1.8 kQ _ 6.2V -0.7V 18kQ = 3.06mA ~ 3mA -18V FIG. 4.84 Constant-current circuit for Example 4.30.  Section 4.15 pip | Transistors  pnp Transistors : I, = Vcc + VBE * ° Re + (8B + DRe : er, =e eres as EGE Iku) = fie FIG. 4.85 pnp transistor in an emitter- stabilized configuration. Transistor Switching Networks Section 4.16 ef OV (a) OV a ¥  (b) FIG. 4.87 Transistor inverter. Other than computer logic, the transistor can also be employed as a switch using the same extremities of the load line. EXAMPLE 4.32 Determine Rp, and Rc for the transistor inverter of Fig. 4.90 if/¢, = 10 mA. 0V 10 V OV Vec= 10 V FIG. 4.90 Inverter for Example 4.32. 10 V 10 V OV Solution: At saturation, and so that At saturation, 10mA =~ R 10 V 10 mA Few = LO mA Bac 250 = 40 pA h FE = 250 FIG. 4.90 Inverter for Example 4.32. Trouble- shooting Techniques Section 4.17 B = 0.7 V Si = 0.3 V Ge 0.3 V = saturation = 1.2 V GaAs iA) 0 V = short-circuit state or poor connection + = Normally a few volts Vier or more FIG. 4.93 Checking the dc level of Vcr. FIG. 4.92 Checking the dc level of Vpr. Vee = 20 V ob ic=0mA t Ro We =0V Open oe connection / — FIG. 4.94 Effect of a poor connection or damaged device. FIG. 4.95 Checking voltage levels with respect to ground. B: increases with increase in temperature \Vpp|: decreases about 2.5 mV per degree Celsius (°C) increase in temperature Ico (reverse saturation current): doubles in value for every 10°C increase in temperature TABLE 4.2 Variation of Silicon Transistor Parameters with Temperature TCC) Ico (nA) B Var (V) —65 02x 10° 20 0.85 25 0.1 50 0.65 100 20 80 0.48 175 3.3 x 10° 120 0.3  Ip= OMA (a) 25°C; 10 15 ~ Icro= BI cro Veg 4 Ic (mA) 50 pA Increase (3) Ip=0 pA Icro= Bl éso Increase (/¢¢) | | | > 0 5 10 { 15 20 Vee (b) 100°C.  STABILITY FACTORS Alc S(V pe) AVap Al s(B) = —  S ( pb ) Fixed-Bias Configuration er BIE) By Emitter-Bias Configuration Voltage-Divider Bias Configuration Ic + Rrp/Rp) AI Ic, + Rp/Rp) _ Th S(B) = 55 = - ue ae By(B2 + Ron/Re) ABB (Ba + Rp/Re) Feedback-Bias Configuration (RA; = 0 ©) Ic(Rg + Re) S = SSS 2 Bi(Rpg + BoRc)  Summary of Stability Factors General Conclusion: The ratio Rp/Rx or Ry/R», should be as small as possible with due consideration to all aspects of the design, including the ac response. Practical Applications (Transistors) Section 4.19