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Exam 2
March 17, 2006
Dr. W. Alan Doolittle
Print your name clearly and largély:
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Instructions:
Read all the problems carefully and thoroughly before you begin working. You are allowed to
use | new sheet of notes (1 page front and back), your note sheet from the previous exam as
well as a calculator. There are 100 total points in this exam. Observe the point value of each
problem and allocate your time accordingly. SHOW ALL WORK AND CIRCLE YOUR
FINAL ANSWER WITH THE PROPER UNITS INDICATED. Write legibly. If I can not
read it, it will be considered to be a wrong answer. Do all work on the paper provided. Turn in
all scratch paper, even if it did not lead to an answer. Report any and all ethics violations to the
instructor. Good luck!
Sign your name on ONE of the two following cases:
I DID NOT observe any ethical violations during this exam:
T observed an ethical violation during this exam:
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First 20% True /False and Multiple Choice - Select the most correct answer(s)
_
|.) (2-points) True ‘False? The depletion capacitance of a transistor junction increases in
magnitude with increasing reverse bias.
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2.) (2-points)True’/ False: The law of the junction predicts increasing voltage for excess
minority carrier concentrations greater than equilibrium (at the depletion region edges).
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3.) (2-points) True / False: For reasons of speed, solar cells should have very small
minority carrier diffusion lengths.
4.) (2-pointsy True / False: A forward active biased transistor with zero base width
modulation effect can be considered a near perfect current source.
5.) (2-points) True // False: Polycrystalline silicon emitters are typically used for modern
BJTs because manufacturing problems prevent the use of crystalline silicon emitters.
6.) (2-points) True False: "Breakdown should always be avoided because it destroys (or at
least damages) the diode.
7.) (2-points) If a Clemson engineer wanted to bias
this transistor into Inverse Active mode, which of
the following is true? i
a_ V3>V1_ and V1>V3 V37 V5 +] V2
“b.) V2>V1_ and V2<V3 lov =
“ce. V2>V3_ and V1>V3 fen
d. V1<V2 and V38V2
e. None of the above. +
8.) (2-points) Which of the following is NOT a use of a diode, ...
Solar Cell ~
Frequency doublers (through generation of harmonics)
. Full wave rectifier
High frequency amplifier
Light emitting diode
All of the above are uses of a diode
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9.) (2-points) Regarding Large signal vs Small signal models of diodes and transistors,
which of the following are NOT true:
a. Large signal models are linear models
b. Mathematically, small signals are when voltages are less than the thermal
voltage
C Ohms law applies for small signals
d. The AC conductance is determined by finding the slope of current vs voltage
curves at a DC operating point.
( Small signal resistances are small when p-n junctions are reverse biased.
f. This question is completely unfair!
13) (20 — points)
For the following circuit, the battery, Vsource, is fully charged to an initial voltage of 24 V.
Calculate the voltage, Vout, for this case (a fully charged battery) and for a battery that is
“discharged” having only a voltage of 12 V. The 1N750 diode and QI has a forward turn on
voltage of 0.7 V and a reverse breakdown voltage of 4.7 V. You can assume the transistor Ql
is always maintained in forward active mode. You know nothing about f, «, Ip, or Ic. (Yes
you have been given enough information to solve the problem). .
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14). Pulling all the concepts together for a useful purpose:
(40-points total: DC solution = 12 points, conversion to small signal model = 12 points, AC solution =
12 points and 4 points for accuracy of the graph)
For the circuit below:
Diode: Io=Is=259 pA
QL: Viurn on=0.7 V, Is=1.46e-14 A, Bpc=100, Va=100V
VinAC = ImV amplitude (i.e. 2mV peak to peak) at 1 KiloHertz
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12V
Given the above input voltage, VinAC, sketch and accurately label a plot the TWO output
waveforms VoutAC and VoutDC on the graph paper provided on the next page. Assume the
turn on voltages for all forward biased junctions are 0.7 V. You may assume all capacitors are
very large values and are thus, AC shorts and any inductors are very large values, and thus AC
opens. Additionally consider the circuit to be operated at low frequencies where you can
neglect all small signal capacitances of transistors and diodes. Also, neglect all resistances that
result from quasi-neutral regions. For full Credit, be sure to check your assumptions on the
mode of operation of the transistor and to clearly label the axes of your plot.
Hint: Use the CVD/Beta analysis for the DC transistor solution. You will need to use the full
diode model (i.e. not the CVD model) for the diodes. Then apply your results to convert to the
small signal model for both the BJT and diodes (i.e. do not ignore the small signal model of the
diode).
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