Exam III - Microelectronic Circuits - Solved Questions | ECE 3040, Exams of Electrical and Electronics Engineering

Download Exam III - Microelectronic Circuits - Solved Questions | ECE 3040 and more Exams Electrical and Electronics Engineering in PDF only on Docsity! ECE 3040B Microelectronic Circuits Exam 3 July 24, 2001 Dr. W. Alan Doolittle 4 Print your name clearly and largely: Sel ution Instructions: Read all the problems carefully and thoroughly before you begin working. You are allowed to use | new sheet of notes (1 page front and back), your note sheets from the previous exams as well as a calculator. There are 100 total points in this exam. Observe the point value of each problem and allocate your time accordingly. SHOW ALL WORK AND CIRCLE YOUR FINAL ANSWER WITH THE PROPER UNITS INDICATED. Write legibly. If I cannot read it, it will be considered a wrong answer. Do all work on the paper provided, Turn in all scratch paper, even if it did not lead to an answer. Report any and all ethics violations to the instructor. Good luck! Sign your name on ONE of the two following cases: 1 DID NOT observe any ethical violations during this exam: I observed an ethical violation during this exam: First 25% Multiple Choice and True/False (Select the most correct answer) 1.) (2-points) A MOS Transistor can be: a.) An enhancement mode NMOS device b.) A depletion mode PMOS device c.) An enhancement mode PMOS device d.) A depletion mode NMOS device (<)) All of the above 2.) (2-points) Depletion mode MOS transistors have large DC gate currents but enhancement mode MOS transistors have no DC gate current. a.) True Cb.) False Tam totally confused on this question 3.) (3-points) True A “teal world” ( Non-ideal -Amp has infinite open loop gain. Soneiceal Pg ( 4 4.) (3-points) The following condition defines the triode or linear region of operation of a “ eo NMOS Enhancement mode transistor. oP 8, sh Vos<Vr and Vos<Vas ~ Vr LEN 0?” (6) Vas>Vr and Vos<Vas ~ Vr eg UCT Ves>Vr and Vos>Ves Up t 6 d.) All of the above e.) I would much preferred you not asking this question. 5.) (3-points / | point each) For the following amplifier: a.) Is thisa: (age Coren Transconductance, or Transresistance Amplifier b.) Should this"amptifier have af High dr input impedance for maximum voltage gain? c.) Should this amplifier have an High ofLonpoupat impedance for maximum voltage gain? Rs Rout —— Nae % ER, AYig RS tow Third 25% Problems (3 25%) 8.) (a. 15-points) Plot the voltage gain transfer function ( Voltage gain in dB vs. Log(frequency) ), Vow/Vin of the following circuit from 1Hz to 10MegHz showing the break frequencies and low and high frequency gains in dB. (b. 10-points) Determine the input resistance and output resistance of the following circuit. Hints for both parts: Treat the parallel resistor/capacitor combination as one impedance. If you do so, you can write the gain expression directly from the configurations we derived in class. Once you do this, you can simplify the transfer function into the standard form, from which the poles and zeros can be extracted. You may assume that the Op-Amps are ideal. pe 100k Simi far te inverting confisaratian” - Ay= Vaut Ra _ _ Riles Wi ~ R, ? Ri |latg Ra C$ - | + Ryo Ry EERGS $ = - (00 l+ Te s(cad) $ [+ Tet rack Tn pur _Fapedoves Due to rhe virtual prow J a+ the AT. terminal, dx Ve fete |— 1 Wie tug ! Ground! jen . = R|4 ‘ Ourger Lagedancr p Rout = o ||Ra|l& D ‘ {t : Virtua f bf YY Extra work can be done here, but clearly indicate with problem you are solving. {00 viv b od B dee 0 db [dee Extra work can be done here, but clearly indicate with problem you are solving. 5 = Tos Loa Uss— Vow - T3e3-1 = 2.00466 § => aw Fo={ Tos V' Ciugsees 77 > + Vos + + 44,076 1) our = 9m 5 (Rell Reus) 2.) Vn = V5 ¥ Vous Using G) pn (a) Wn = ear A 9m Be (Rs liRusa!) Vin = Vo cat ( + grill Reaad) Gn Bs |ReanS) 9m (Rs | Resa) Cane gm Csi Resdk) Vin 1 gm (Roll Road) Vout an = 0107 Vi Bonus: (10-points “All or Nothing”) Draw the cross-sectional view (view from the side) of a PMOS transistor biased in saturation mode. Label the source, gate, drain, channel, substrate and indicate the doping type of the source, drain and substrate. Also, indicate the relationship between Vsg and Vsp for which saturation is maintained. G s D . —- ! P+ anne j Pt Loe AL | ype ~~ ! n-type XN | Substrate No / Vsp >Vsct Vp (+0)