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Final Exam with Answers Key - Advanced VLSI Design and Applications | ECEN 6263, Exams of Electrical and Electronics Engineering

Material Type: Exam; Professor: Johnson; Class: ADV VLSI DES & APP; Subject: Electrical and Computer Engineering ; University: Oklahoma State University - Stillwater; Term: Fall 2009;

Typology: Exams

2010/2011

Uploaded on 07/17/2011

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Download Final Exam with Answers Key - Advanced VLSI Design and Applications | ECEN 6263 and more Exams Electrical and Electronics Engineering in PDF only on Docsity! ECEN 6263 Fall 2009 Final Exam WRITE YOUR NAME HERE Adswley— All questions must be answered on test paper! Open Book, Open Notes 1, Anew 20nm process has the following parameters Ry = 12KQ Ryy = 25KQ Cyg = 62F om? Cog = 62F um” Credo = laF/nom Credo = laF/om EL=2h Wain = 4h A = 10nom Inm = 10%m tak = 1087 LF = 10" 1F The diffusion capacitances are negligible (K = 0). a. What is the unit R? ni > Paw wee on ‘ R= Ken fe, = (2KOg Kw b. What is the unit C? @s (Es "G2 Cado |W run = (Gx"> Zo# Ito” "| fe ys pein = pye ak c.What is the unit delay Ar? _ 3 at IS Be pos bxw + Bo §cyy ie = £08 AW Set OSG psee CEN 6263 Falt 2009 Final Exam December 9, 2009 1 d.If an inverter with minimum size FETs drives a load of 100 aF, estimate the rise time delay. Ww CheP = n tp he a ERE) Bae WES, bot wth KO R 0 ots ote - ty Ware? Win we | Crm i At to PE ROC! wp a, RO Te 4 © = Byles + tee at Otel Wms wtf + 26g) a. seP ps 2 AR pee e.If an inverter with minimum size FETs drives a load of 100 aF, estimate the fall time delay. y _ yd “eps 4 “At or at Rebs woe wR £4 bee LWA es 4 Wee Re C fora! — oF bon af thw Wat C Dre AE Fe AE Set Wy (it Slat at Fit gre) uso€ pee Sh pee ECEN 6263 Fall 2009 Final Exam December 9, 2009
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