High Performance Computer Architecture Course Videos - Project 1 | CS 4290, Study Guides, Projects, Research of Computer Science

Download High Performance Computer Architecture Course Videos - Project 1 | CS 4290 and more Study Guides, Projects, Research Computer Science in PDF only on Docsity! Georgia Institute of Technology College of Computing CS 4290 / CS 6290 ` Out: March 8, 2005 Project 1 In: March 31, 2005 Setting Things Up - This project is intended to introduce you to SimpleScalar V3.0, the simulator we will be using. - First, you will have to find a Linux machine. - We have tested the simulator on a Linux Red Hat 9 machine, but it should work fine on other recent versions of Linux. - The machines you can use for the project are the Intel Cluster (CCB 103) and the Undergraduate Project Lab (CCB 107). - If you do not have an account that works on these machines, use the online form at http://www.cc.gatech.edu/cns/forms/account_form.html to apply for an account. If the form does not work for you, get a paper form available outside CCB 213 and in front of CCB 140 and follow the directions on the coversheet. - Once you have successfully logged on to a Linux machine, copy the simulator archive from /net/ac89/www-db3/classes/AY2005/cs4290_spring/SIM/simplesim- 3v0d.tgz into your own directory. - Then, “gunzip simplesim-3v0d.tgz” followed by “tar xvf simplesim-3v0d.tar” should result in the “simplesim-3.0” directory. - Go into that directory. - Because the simulator can simulate multiple ISAs, we need to set it up to use the one we want. We will be using the Alpha ISA, so do “make config-alpha”. - Now we are ready to compile the simulator. Simply do “make”. Among other things, this should create the “sim-outorder” executable which is the actual simulator we will use. - Once the simulator is created, go back to your local directory. - Now we need to get some benchmarks. - Copy the benchmarks archive (/net/ac89/www-db3/classes/AY2005/cs4290_spring/SIM/benchmarks.tgz) into your local directory, unzip it and untar it. - Now you should have a “benchmarks” directory. - Go into that directory. The benchmarks are already compiled and ready to use for simulations. Running the Simulator: - SimpleScalar actually has multiple simulators, which simulate the machine at different levels of detail. - We will use sim-outorder, the most detailed one. o It can simulate, cycle by cycle, an N-way superscalar processor with dynamic scheduling, branch prediction, speculation, caches, etc. o Such detailed simulation is slow, so we will limit our detailed simulations to only 50 million instructions in each run. o We use the option “-max:inst 50000000 “ in the simulator to do this. Page 1 of 3 o However, the initialization parts of an application are very different from the rest of it, so we will fast-forward through the first 10 million instructions of each run.  To do this, we add the option “-fastfwd 10000000”. o Finally, we only use two benchmarks, cc1 and go. o To run the cc1 benchmark, we use  ../simplesim-3.0/sim-outorder -fastfwd 10000000 -max:inst 50000000 cc1.alpha -O 1stmt.i  This command line calls the simulator with some simulator options, followed by the name of the simulated application, followed by the parameters for that application.  In this case, cc1 takes parameters “-O 1stmt.i”.  Similarly, the go benchmark uses parameters “50 9 2stone9.in”:  ../simplesim-3.0/sim-outorder -fastfwd 10000000 -max:inst 50000000 go.alpha 50 9 2stone9.in - When the simulator runs, it displays the current configuration of the simulated machine. - The options we do not specify will use default values. - For example, the default decode, issue, and commit width of the processor is 4, making it a 4-way superscalar processor. - If, however, we specify “-decode:width 8” in the simulator options, the processor will be able to decode up to 8 instructions per cycle. - Similarly, the default is dynamic scheduling. Specifying “-issue:inorder true” changes the processor to use static scheduling. - Similarly, the “bpred” options change the configuration of the branch predictor, the “cache” options change the configuration of the caches, etc. The Assignment: - In this project, you will examine how the performance of statically and dynamically scheduled processors depends on the branch misprediction penalty and the type of the branch predictor. - First we examine the effect of branch misprediction latency on processor performance, leaving all other processor parameters at their default values. o For this part, your report should contain two charts, one for each application. o On the X-axis of each chart is the misprediction penalty N, which can be changed using “-fetch:mplat N” option. Use values 1,3,5,7, and 9 for N. o On the Y-axis is the IPC (instructions per cycle). o Plot two curves, showing how the IPC depends on the N with dynamic and static scheduling on the same chart. o Why is the IPC for CC1 lower than for GO? o Why does the performance of a dynamically scheduled processors decline faster than that of a statically scheduled processor when the misprediction penalty increases? - Now we examine different types of branch predictors. o The types of branch predictors we will examine are:  (1) the predict-not-taken predictor, which predicts that no conditional branch is ever taken,  (2) the one-bit direction predictor, and  (3) the two-bit direction predictor. o To use the predict-not-taken predictor, use the “-bpred nottaken” option. Page 2 of 3