Solutions to Computer Architecture and Design Homework 2 for ELEC 5200-001/6200-001 - Prof, Assignments of Computer Architecture and Organization

Download Solutions to Computer Architecture and Design Homework 2 for ELEC 5200-001/6200-001 - Prof and more Assignments Computer Architecture and Organization in PDF only on Docsity! ELEC 5200-001/6200-001 Computer Architecture and Design Spring 2007 Homework 2 Solution Assigned 1/22/07, due 1/29/07 Problem 1: Define Harvard and von Neumann architectures. Answer: Harvard architecture: Use two separate memories for program and instructions. Von Neumann architecture: Use a single memory for both program and instructions. Problem 2: Why is the IAS computer strongly influenced by the von Neumann bottleneck? How will you change the instruction set architecture to reduce the effect of the bottleneck? Answer: The IAS computer had 21 instructions. All but two instructions, LSH (left shift) and RSH (right shift), required memory operation. One memory word was used for two instructions. Thus neglecting LSH and RSH, a typical program will require on an average 1.5 memory accesses per instruction. The execution speed will therefore be controlled by the communication between the memory and the processor. This is generally known as the von Neumann bottleneck. Reducing the effect of the bottleneck: We can add a register file to the hardware organization of the datapath. Then modify instructions to save intermediate results in registers rather then sending them to and then recalling from memory.