Information Technology Architectures - Examination 2 Review | CNIT 17600, Study notes of Computer Science

Download Information Technology Architectures - Examination 2 Review | CNIT 17600 and more Study notes Computer Science in PDF only on Docsity! Exam II Review Chapter 4 CPUs  Components and their roles  Data Types & Instructions  Clock Rate  Decoders (section 4.13) Buses  Architectures  Components  Control Protocols & Arbitration Memory Organization & Addressing  Byte vs Word Addressing  Memory interleaving Interrupts (maskable vs non-maskable) Interrupt processing Chapter 5 Instruction Sets  Fixed vs variable length instructions  Big endian vs. little endian  Instruction types & formats Instruction Addressing Modes  Immediate  Direct  Indirect  Indexed Pipelining (ILP vs PLP) Chapter 6 Types of Memory  RAM vs ROM  SRAM vs DRAM  DDR types Memory Hierarchy Hit vs Miss (Hit Rate vs Miss Rate) Localities Cache Mapping (content addressable memory)  Direct Mapped  Fully-Associative Mapped  Set-Associative Mapped Victim Blocks and Replacement Policies Dirty Blocks and Write Policies Cache Levels & types (data vs instruction)