Download Understanding and Building Different Types of Counters in Digital Logic and more Study notes Computer Architecture and Organization in PDF only on Docsity! Counters 1 Counters • Next, we’ll look at different kinds of counters and discuss how to build them. • These are not only examples of sequential analysis and design, but also real devices used in larger circuits, as we’ll see in the coming weeks. Counters 2 Introducing counters • Counters are a specific type of sequential circuit. • The state, or the flip-flop values themselves, serves as the “output.” • The output value increases by one on each clock cycle. • After the largest value, the output “wraps around” back to 0. • Using two bits, we’d get something like this: • We’ll soon look at some extensions to this basic idea. Present State Next State A B A B 0 0 0 1 0 1 1 0 1 0 1 1 1 1 0 0 00 01 1011 1 11 1 Counters 5 The complete state diagram and table 00 01 1011 0 0 0 10 1 1 1 Present State Inputs Next State Q1 Q0 X Q1 Q0 0 0 0 0 1 0 0 1 1 1 0 1 0 1 0 0 1 1 0 0 1 0 0 1 1 1 0 1 0 1 1 1 0 0 0 1 1 1 1 0 • Here’s the complete state diagram and state table for this circuit. – Make sure you know how to come up with these – this is a typical sequential design problem! Counters 6 D flip-flop inputs • If we use D flip-flops, then the D inputs will just be the same as the desired next states. • K-maps for the D flip-flop inputs are shown at the right. Present State Inputs Next State Q1 Q0 X Q1 Q0 0 0 0 0 1 0 0 1 1 1 0 1 0 1 0 0 1 1 0 0 1 0 0 1 1 1 0 1 0 1 1 1 0 0 0 1 1 1 1 0 Q0 0 1 0 1 Q1 1 0 1 0 X Q0 1 1 0 0 Q1 1 1 0 0 X D1 = D0 = Counters 7 D flip-flop inputs • If we use D flip-flops, then the D inputs will just be the same as the desired next states. • Equations for the D flip-flop inputs are shown at the right. • Why does D0 = Q0’ make sense? Present State Inputs Next State Q1 Q0 X Q1 Q0 0 0 0 0 1 0 0 1 1 1 0 1 0 1 0 0 1 1 0 0 1 0 0 1 1 1 0 1 0 1 1 1 0 0 0 1 1 1 1 0 Q0 0 1 0 1 Q1 1 0 1 0 X Q0 1 1 0 0 Q1 1 1 0 0 X D1 = Q1 ⊕ Q0 ⊕ X D0 = Q0’ Counters 10 JK flip-flop input equations • J1 = • K1 = • J0 = • K0 = Present State Inputs Next State Flip flop inputs Q1 Q0 X Q1 Q0 J1 K1 J0 K0 0 0 0 0 1 0 x 1 x 0 0 1 1 1 1 x 1 x 0 1 0 1 0 1 x x 1 0 1 1 0 0 0 x x 1 1 0 0 1 1 x 0 1 x 1 0 1 0 1 x 1 1 x 1 1 0 0 0 x 1 x 1 1 1 1 1 0 x 0 x 1 Counters 11 JK flip-flop input equations • We can then find equations for all four flip-flop inputs, in terms of the present state and inputs. Here, it turns out J1 = K1 and J0 = K0. J1 = K1 = Q0’ X + Q0 X’ = Q0 ⊕ X J0 = K0 = 1 • Why does J0 = K0 = 1 make sense? Present State Inputs Next State Flip flop inputs Q1 Q0 X Q1 Q0 J1 K1 J0 K0 0 0 0 0 1 0 x 1 x 0 0 1 1 1 1 x 1 x 0 1 0 1 0 1 x x 1 0 1 1 0 0 0 x x 1 1 0 0 1 1 x 0 1 x 1 0 1 0 1 x 1 1 x 1 1 0 0 0 x 1 x 1 1 1 1 1 0 x 0 x 1 Counters 12 The counter in LogicWorks again • Here is the counter again, but using JK Flip Flop n.i. RS devices instead. • The “n.i. RS” part means that the direct inputs R and S are non-inverted, or active-high. • So this version of the circuit counts normally when Reset = 0, but initializes to 00 when Reset is 1. Counters 15 …or maybe you do care • To get the safest possible circuit, you can explicitly fill in next states for the unused states 110 and 111. • This guarantees that even if the circuit somehow enters an unused state, it will eventually end up in a valid state. • This is called a self-starting counter. Present State Next State Q2 Q1 Q0 Q2 Q1 Q0 0 0 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 1 1 0 0 1 0 0 1 0 1 1 0 1 0 0 0 1 1 0 0 0 0 1 1 1 0 0 0 001 010 011 100 101 000 111110 Counters 16 LogicWorks counters • There are a couple of different counters available in LogicWorks. • The simplest one, the Counter-4 Min, just increments once on each clock cycle. – This is a four-bit counter, with values ranging from 0000 to 1111. – The only “input” is the clock signal. Counters 17 More complex counters • More complex counters are also possible. The full-featured LogicWorks Counter-4 device below has several functions. – It can increment or decrement, by setting the UP input to 1 or 0. – You can immediately (asynchronously) clear the counter to 0000 by setting CLR = 1. – You can specify the counter’s next output by setting D3-D0 to any four-bit value and clearing LD. – The active-low EN input enables or disables the counter. • When the counter is disabled, it continues to output the same value without incrementing, decrementing, loading, or clearing. – The “counter out” CO is normally 1, but becomes 0 when the counter reaches its maximum value, 1111. Counters 20 Another restricted counter • We can also make a circuit that counts up to only 1100, instead of 1111. • Here, when the counter value reaches 1100, the NAND gate forces the counter to load, so the next state becomes 0000. Counters 21 Count by 2’s • How might you make the counter count by 2’s? E.g. 0000, 0010, 1110 Counters 22 Summary • Counters serve many purposes in sequential logic design. • There are lots of variations on the basic counter. – Some can increment or decrement. – An enable signal can be added. – The counter’s value may be explicitly set. • There are also several ways to make counters. – You can follow the sequential design principles from last week to build counters from scratch. – You could also modify or combine existing counter devices.