Introduction to Thermodynamics, Assignments of Thermodynamics

Download Introduction to Thermodynamics and more Assignments Thermodynamics in PDF only on Docsity! 1 Design and Development of a Simulator for Microprocessor and its Compiler Assignment No.1 CS-212 Object Oriented Programming Contents 1 Administrivia .......................................................................................................... 3 1.1 Learning Objectives .............................................................................................. 3 1.2 Deliverables and Time-line ................................................................................ 3 1.3 Marks Distribution ............................................................................................... 3 2 Introduction ............................................................................................................ 3 3 Components (Logic ICs) Used ............................................................................ 4 4 Arithmetic Logic Unit ........................................................................................... 4 4.1 Combinational Logic ............................................................................................ 4 4.2 Circuit Assembly ................................................................................................... 5 5 Data Registers ......................................................................................................... 6 5.1 Functionality and Time Synchronization ........................................................ 6 5.2 Testing ..................................................................................................................... 8 5.3 Output Register ................................................................................................... 10 5.4 Register De-multiplexing .................................................................................. 11 6 Control Logic ......................................................................................................... 12 2 6.1 Instruction Memory ........................................................................................... 12 6.2 Program Counter ................................................................................................ 13 6.3 Instruction Encoding ......................................................................................... 14 7 Programming ........................................................................................................ 15 7.1 Fibonacci Numbers ............................................................................................ 18 8 Concluding Remarks .......................................................................................... 16 5 Here “A” and “B” are the two inputs, “Out” is the output and “S”,the selection bit. Subtraction will be carried out by inverting the bits (i.e. taking 1’s complement) of B and raising the “carry in” of adder to logic 1, in order to add an extra bit which will eventually generate 2’s complement of B. A − B = A + (10s complement of B) + 1(carry in) A − B = A + (20s complement of B) For inverting the bits we will use XOR gate with one input tied to the selection bit S, and the other to the input bit, such that when selection bit goes 1, the property of XOR, B ⊕ 1 = B0 can be used and when it is 0 the input passes unaffected B ⊕ 0 = B. 4.2 Circuit Assembly The block diagram of ALU is shown in Figure 1. Figure 1: Arithmetic Logic Unit (ALU) 6 Selection bit (S)Function 0Out = A + B 1Out = A − B 5 Data Registers At least two 4-bit registers are required to hold the data for ALU. The output of these two registers, say RA and RB, are directly connected to the two inputs of the ALU, A and B respectively. The output of these registers is always enabled i.e. they are always channeling data into the ALU. However the input to these registers is controlled and data can only enter into them when the input enable bit of RA and RB is at logic 1. Figure 2: Register-ALU Assembly 5.1 Functionality and Time Synchronization To start the computation, we need to load some initial values to RA and RB. Moreover, we would also like to utilize these registers to save the output of ALU too. In order to achieve this dual functionality, we need to add a 4-bit 1- out-of-2 data MUX before the input of registers. One of the MUX inputs would be connected to ALU’s output and the other one to custom input. The selection bit of this MUX, say Sreg must be 0 to let the ALU’s data pass through and 1 for custom value. The updated datapath is shown in Figure 3. 7 A small D flip-flop is also placed adjacent to ALU to store the carry bit into it on positive edge of clock so that we can examine the status of arithmetic operation performed by ALU. Here the concept of clock is important. We know that registers are made of flip-flops that only store data on the positive edge of clock (assuming the enable signal is 1, otherwise clock edges are in-effective). The small triangle on RA and RB in Figure 3 symbolizes input clock. Let’s see an example. Suppose through custom input (in past), 2 was stored in RA and 3 in RB. Now, enable of RA is 1, enable of RB is 0, selection bit (S) of ALU is 0 and Sreg is also 0. At the output of ALU, the sum 5 is present. As soon as the positive edge of clock comes, 5 got stored in RA (as its enable pin was high) and appears at the output of RA, the output of ALU becomes 8. But due to “internal gate delays”, 8 appears a few nano-seconds after the positive edge had passed and now it cannot enter any register until next positive edge arrives. We can turn down the enable pins of registers to zero, to make clock edges in-effective so that the incoming 8 may not replace previously stored 5. Figure 3: Modified Register-ALU Assembly 10 Step 5 5.3 Output Register A small addition to our design, the output register RO. We shall use this register to store the final result after all the processing for the user to refer. The register is directly connected with RA. 11 Figure 5: Output Register 5.4 Register De-multiplexing There are now three signals associated with the registers, enA, enB and enO. In order to reduce these signals we will use a 2-to-4 decoder (two inputs and four outputs) with a truth table shown below, Input (D0,D1)Output (O0,O1,O2,O3) 001000 010100 100010 110001 Now the outputs of decoder are connected such that O0 to enA, O1 is to enB and O2 to enO, Input (D0,D1)Output 00RA input enabled 01RB input enabled 10RO input enabled 11no operation Keep in mind, from now onward we will call the value of D0D1, “address” of the corresponding register. 12 Figure 6: Design with Decoder Incorporated 6 Control Logic We cannot apply logic values on the control signals manually, all the time. In order to avoid this inconvenience, we can store the values of control signals in a non-volatile memory (ROM or EEPROM) and connect its output lines to our design. Let’s call the values of the control signal stored in the memory as Instructions. 6.1 Instruction Memory Memory is an array (having rows and columns) of cells, which can store binary data (1 or 0). For our design we will talk about those memories having 8 cells (or bits) in each row. Each 8-bit wide row can be accessed by its address starting from zero to (length of array - 1). We will store the set of control signals one in each row. For example in “swapping” test, the set of control signals was {110x, 101x, 0100, 0011, 0101}. We can store 110x in row(0), 101x in row(1) and so on. For an 8-bit row, each set of signals (also called “instruction”) will take only four bits, the rest of bits, we don’t care. 15 is hard wired to zero (ground), which means, we can only load values ranging from 0 to 7 (either in program counter or registers). 6. ADD or SUB (S): The second bit of the instruction has dual function. Apart from being part of custom input, it is also connected to ALU selection bit S. This decision is taken based on the observation that when ALU is performing either addition or subtraction, there is no interference of custom input. Similarly, when we are loading some custom input to either registers or counter, we don’t care about ALU processing. 7 Programming There are 9 functions we can perform with this machine. The functions and the set of control signals for them are, Table 1. Instruction Types and Control Signals Function J C D1 D0 Sreg S Custom Input RA = RA + RB 0 0 0 0 0 0 0 0 RB = RA + RB 0 0 0 1 0 0 0 0 RA = RA − RB 0 0 0 0 0 1 0 0 RB = RA −RB 0 0 0 1 0 1 0 0 RO = RA 0 0 1 0 0 0 0 0 RA = imm 0 0 0 0 1 imm[2] imm[1] imm[0] RB = imm 0 0 0 1 1 imm[2] imm[1] imm[0] Jump to imm if carry out 0 1 1 1 0 imm[2] imm[1] imm[0] Jump to imm 1 0 1 1 0 imm[2] imm[1] imm[0] 16 Figure 10: 4-bit Number Crunching Machine 8 Tasks Assume a program is written using the above-mentioned assembly instructions to swap 2 numbers and is saved as ‘swap.asm’. RA = 2 RB = 3 RA = RA + RB RB = RA – RB RA = RA – RB 17 Task # 1 - Assembler: Write a small Assembler in C/C++ which reads the above-mentioned file ‘swap.asm’ and stores the corresponding machine code in Instruction Memory. You can have 100x8 Instruction Memory with 100 locations with each location 8-bit wide. Note down the number of instructions read from the file. Task # 2 - Instruction Fetch: Extend the above program and write a small function to fetch instruction from the Instruction Memory. You have to declare a Program Counter in main, initialize it with ‘0’. Now using the loop, fetch new instruction from the Instruction Memory and store it in an Instruction Register until you reach at the end of the program. Print each instruction fetched from memory. Task # 3 - Instruction Decode: Extend the above program and write a small function to decode instruction present in the Instruction Register. The output of this function will contain the Instruction Type as well as a structure comprising all the control signals including ‘J’, ‘C’, ‘Sreg’, ‘S’, ‘RA_En’, ‘RB_En’, ‘R0_En’ (You will have to implement a small 2- 4 Decoder to generate enable signals from ‘D0’ and ‘D1’). There will be three outputs from this function i.e. ‘InstructionType’ (see Table 1) and a structure comprising control signals and ‘Imm’ value. Task # 4 - Instruction Execute: Extend the above program and write a small function to execute the instruction. This function will take input as RA, RB, R0 (These need to be declared within main), structure with control signals and ‘Imm’, ‘InstructionType’, Program Counter. Based on ‘InstructionType’, it will perform execution of relevant instruction. The function will give ALU_Output, store ‘Carry’ and update Program Counter based on the instruction type.