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MIPS Assembly and Computer Architecture: Week 2, Study notes of Electrical and Electronics Engineering

A collection of notes from week 2 of a computer architecture and assembly language course, focusing on the mips instruction set architecture, arithmetic instructions, and registers. It covers the basics of mips assembly language, including instruction categories, register usage, and memory addressing.

Typology: Study notes

Pre 2010

Uploaded on 09/17/2009

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Download MIPS Assembly and Computer Architecture: Week 2 and more Study notes Electrical and Electronics Engineering in PDF only on Docsity! 331 W02.1 Fall 06 14:332:331 Computer Architecture and Assembly Language Fall 06 Week 2 : ISA, MIPS Assembly [Adapted from Dave Patterson’s UCB CS152 slides and Mary Jane Irwin’s PSU CSE331 slides] 331 W02.2 Fall 06 Assembly Language Language of the machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS arithmetic instructions We’ll be working with the MIPS instruction set architecture similar to other architectures developed since the 1980's used by NEC, Nintendo, Silicon Graphics, Sony, … 32-bit architecture - 32 bit data line and address line - data and addresses are 32-bit 331 W02.5 Fall 06 Compiling More Complex Statements Assuming variable b is stored in register $s1, c is stored in $s2, d is stored in $s3 and the result is to be left in $s0, and $t0 is a temporary register, what is the assembler equivalent to the C statement h = (b - c) + d 331 W02.6 Fall 06 Registers Registers are Faster than main memory Can hold variables so that - code density improves (since registers are named with fewer bits than a memory location) – why is that? Register addresses are indicated by using $ 331 W02.7 Fall 06 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath’s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Register File src1 addr src2 addr dst addr write data 32 bits src1 data src2 data 32 locations 325 32 5 5 32 331 W02.10 Fall 06 Accessing Memory MIPS has two basic data transfer instructions for accessing memory lw $t0, 4($s3) #load word from memory sw $t0, 8($s3) #store word to memory The data transfer instruction must specify where in memory to read from (load) or write to (store) – memory address where in the register file to write to (load) or read from (store) – register destination (source) The memory address is formed by summing the constant portion of the instruction and the contents of the second register 331 W02.11 Fall 06 Processor – Memory Interconnections Memory is viewed as a large, single-dimension array, with an address A memory address is an index into the array Processor Memory read addr/ write addr read data write data 232 Addressable locations Q: what should be the smallest addressable unit? 331 W02.12 Fall 06 MIPS Data Types Integer: (signed or unsigned) 32 bits Character: 8 bits Floating point numbers: 32 bits Memory addresses (pointers): 32 bits Instructions: 32 bits Bit String: sequence of bits of a particular length 8 bits is a byte 16 bits is a half-word 32 bits (4 bytes) is a word 64 bits is a double-word 331 W02.15 Fall 06 MIPS Memory Addressing The memory address is formed by summing the constant portion of the instruction and the contents of the second (base) register lw $t0, 4($s3) #what? is loaded into $t0 sw $t0, 8($s3) #$t0 is stored where? Memory . . . 0 1 0 0 Data Word Address 0 4 8 12 16 20 24 . . . 1 0 0 0 . . . 0 0 1 0 . . . 0 0 0 1 . . . 1 1 0 0 . . . 0 1 0 1 . . . 0 1 1 0 $s3 holds 8 331 W02.16 Fall 06 Compiling with Loads and Stores Assuming variable b is stored in $s2 and that the base address of integer array A is in $s3, what is the MIPS assembly code for the C statement A[8] = A[2] - b $s3+4 $s3+8 $s3+12 $s3 . . . A[2] A[3] . . . A[1] A[0] 331 W02.17 Fall 06 Compiling with a Variable Array Index Assuming A is an integer array whose base is in register $s4, and variables b, c, and i are in $s1, $s2, and $s3, respectively, what is the MIPS assembly code for the C statement c = A[i] - b 331 W02.20 Fall 06 MIPS Instruction Fields op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits = 32 bits op rs rt rd shamt funct 331 W02.21 Fall 06 Machine Language - Load Instruction Consider the load-word and store-word instructions, What would the regularity principle have us do? New principle: Good design demands a compromise Introduce a new type of instruction format I-type for data transfer instructions previous format was R-type for register Example: lw $t0, 24($s2) Where's the compromise? op rs rt 16 bit number 35 18 8 24 100011 10010 01000 0000000000011000 331 W02.22 Fall 06 Memory Address Location Example: lw $t0, 24($s2) Memory data word address (hex) 0x00000000 0x00000004 0x00000008 0x0000000c 0xf f f f f f f f $s2 0x12004094 0x00000002 2410 + $s2 = Note that the offset can be positive or negative 331 W02.25 Fall 06 Review: MIPS Data Types Integer: (signed or unsigned) 32 bits Character: 8 bits Floating point numbers: 32 bits Memory addresses (pointers): 32 bits Instructions: 32 bits Bit String: sequence of bits of a particular length 8 bits is a byte 16 bits is a half-word 32 bits (4 bytes) is a word 64 bits is a double-word 331 W02.26 Fall 06 Beyond Numbers Most computers use 8-bit bytes to represent characters with the American Std Code for Info Interchange (ASCII) So, we need instructions to move bytes around ASCII Char Null EOT ACK 7 39 ‘ 55 7 71 G 103 g 119 w 8 bksp 40 ( 56 8 72 H 104 h 120 x 9 tab 41 ) 57 9 73 I 105 i 121 y 10 LF 42 * 58 : 74 J 106 j 122 z 11 43 + 59 ; 75 K 107 k 123 { 12 FF 44 , 60 < 76 L 108 l 124 | 0 1 2 3 4 5 6 15 ASCII Char ASCII Char ASCII Char ASCII Char ASCII Char 112 p q r s t 37 % 53 5 69 E 101 e 117 u 38 & 54 6 70 F 102 f 118 v DEL 113 114 115 116 127 32 space 48 0 64 @ 96 ` 33 ! 49 1 65 A 97 a 34 “ 50 2 66 B 98 b 35 # 51 3 67 C 99 c 36 $ 52 4 68 D 100 d 47 / 63 ? 79 O 111 o 331 W02.27 Fall 06 Loading and Storing Bytes MIPS provides special instructions to move bytes lb $t0, 1($s3) #load byte from memory sb $t0, 6($s3) #store byte to memory What 8 bits get loaded and stored? load byte places the byte from memory in the rightmost 8 bits of the destination register - what happens to the other bits in the register? store byte takes the byte from the rightmost 8 bits of a register and writes it to a byte in memory op rs rt 16 bit number
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