Download ECEN 454 Lab Manual: 16-bit Pipelined Adder Design - Prof. Jiang Hu and more Lab Reports Electrical and Electronics Engineering in PDF only on Docsity! ECEN 454 Digital Integrated Circuit Design Lab0 Setup Instructions and Overview In the labs for this course, you will see the Cadence set of tools for VLSI design. These tools are the state -of-the-art CAD tools widely used in the industry. It is hard to learn the whole software set in one semester. In this semester, we will focus on the part that is very useful in digital IC design. 1. UNIX login 1.By now you should have UNIX accounts on the SUN workstations. If you still do not have accounts, please inform TA. You will be working independently on all the labs. 2. Every time you login you are in your home directory. Create a directory called, say, "cadence" in your home directory where you will do all your Cadence-related works for the whole semester. The UNIX command for creating directory is "mkdir". So type "mkdir cadence" and press return. (UNIX is case-sensitive so type in small alphabets). If you are familiar with UNIX go to section 2. You can find some basic Unix commands help at http://www.math.utah.edu/lab/unix/unix-commands.html 3. Cadence tool (“icfb” is a Integrated circuit front to back end Cadence design integration tool) stores all the files in the directory from which it are started. So every time you start icfb go to this directory (cadence) before starting it. The UNIX command "cd" is used to change directory. Type "cd cadence" to change your working directory to cadence. 4. The other UNIX command for changing directories is "cd .." which means to go back one level (to the parent) in the hierarchy. "cd " takes to the home directory. 5. Another concept in UNIX is that of a process. Every time you run a task on Unix, it is given a process ID called PID. The UNIX command for finding process id is "ps". Type "ps" to see all the processes running on the machine. Processes can be killed using “kill #” command where # is the PID. After you finish your lab, type “exit” to log off if there is no process running or “kill –1 –1” to close all process and log off. Please make sure you log off since other students cannot access the machine if you do not log off and leave. 6. UNIX allows tasks to be run in background meaning you can run other task at the prompt. To run a task in background you should type "&" at the end of the command. 7. You can use any editor you want, such as emacs, vi, etc. To start emacs type "emacs &" (this is an example of running a task in the background). For vi you can try “vim –g filename”. 8. These are some of the basic commands of UNIX. To make you more familiar with UNIX commands refer to some book on UNIX. 9. If you are not in cadence directory, change to cadence. 2.Objective Through Labs 1-8 you will be required to design a 16-bit Pipelined Adder. Following is the block diagram of the circuit. Fig 1. Block diagram for a 16 bit Pipelined adder. Following is a brief description of the design flow you will be using over the next few lab sessions. The detailed requirements for each stage will be in the respective lab manuals 1) You will begin with the implementation of the schematic and its logic simulation. You will be guided to design each of the blocks (using logic gates such as And, Nand, Inv and Flip-Flops) in the above diagram. 2) After verifying the logic design of the circuit you will be designing the custom layout of the gates(standard cells) that were used in the design. 3) The next stage involves performing the standard cell characterization which includes finding rise and fall time delays of the standard cells using transistor level implementation of the cells using Spectre. 4) The next step would be to merge all the standard cell layouts to create one sub-block (one 4-bit adder) of the entire design. 5) You are then required to perform optimization of the circuit in terms of transistor sizes/circuit area (an increased transistor size may occupy more area but is faster in terms of timing and your design should keep such trade-offs in mind), delay of the circuit and power consumed.
