Download Binary Arithmetic: 2's Complement, Multiplication, Division and Representations and more Slides Number Theory in PDF only on Docsity! 1 Lecture 8: Binary Multiplication & Division • Today’s topics: Addition/Subtraction Multiplication Division • Reminder: get started early on assignment 3 2 2’s Complement – Signed Numbers 0000 0000 0000 0000 0000 0000 0000 0000two = 0ten 0000 0000 0000 0000 0000 0000 0000 0001two = 1ten … 0111 1111 1111 1111 1111 1111 1111 1111two = 231-1 1000 0000 0000 0000 0000 0000 0000 0000two = -231 1000 0000 0000 0000 0000 0000 0000 0001two = -(231 – 1) 1000 0000 0000 0000 0000 0000 0000 0010two = -(231 – 2) … 1111 1111 1111 1111 1111 1111 1111 1110two = -2 1111 1111 1111 1111 1111 1111 1111 1111two = -1 Why is this representation favorable? Consider the sum of 1 and -2 …. we get -1 Consider the sum of 2 and -1 …. we get +1 This format can directly undergo addition without any conversions! Each number represents the quantity x31 -231 + x30 230 + x29 229 + … + x1 21 + x0 20 5 Overflows • For an unsigned number, overflow happens when the last carry (1) cannot be accommodated • For a signed number, overflow happens when the most significant bit is not the same as every bit to its left when the sum of two positive numbers is a negative result when the sum of two negative numbers is a positive result The sum of a positive and negative number will never overflow • MIPS allows addu and subu instructions that work with unsigned integers and never flag an overflow – to detect the overflow, other instructions will have to be executed 6 Multiplication Example Multiplicand 1000ten Multiplier x 1001ten --------------- 1000 0000 0000 1000 ---------------- Product 1001000ten In every step • multiplicand is shifted • next bit of multiplier is examined (also a shifting step) • if this bit is 1, shifted multiplicand is added to the product 7 HW Algorithm 1 In every step • multiplicand is shifted • next bit of multiplier is examined (also a shifting step) • if this bit is 1, shifted multiplicand is added to the product 10 MIPS Instructions mult $s2, $s3 computes the product and stores it in two “internal” registers that can be referred to as hi and lo mfhi $s0 moves the value in hi into $s0 mflo $s1 moves the value in lo into $s1 Similarly for multu 11 Fast Algorithm • The previous algorithm requires a clock to ensure that the earlier addition has completed before shifting • This algorithm can quickly set up most inputs – it then has to wait for the result of each add to propagate down – faster because no clock is involved -- Note: high transistor cost 12 Division 1001ten Quotient Divisor 1000ten | 1001010ten Dividend -1000 10 101 1010 -1000 10ten Remainder At every step, • shift divisor right and compare it with current dividend • if divisor is larger, shift 0 as the next bit of the quotient • if divisor is smaller, subtract to get new dividend and shift 1 as the next bit of the quotient 15 Divide Example • Divide 7ten (0000 0111two) by 2ten (0010two) 0000 00010000 00010011Same steps as 45 0000 0011 0000 0011 0000 0011 0000 0100 0000 0100 0000 0010 0000 0001 0001 Rem = Rem – Div Rem >= 0 shift 1 into Q Shift Div right 4 0000 01110000 01000000Same steps as 13 1111 0111 0000 0111 0000 0111 0001 0000 0001 0000 0000 1000 0000 0000 0000 Same steps as 12 1110 0111 0000 0111 0000 0111 0010 0000 0010 0000 0001 0000 0000 0000 0000 Rem = Rem – Div Rem < 0 +Div, shift 0 into Q Shift Div right 1 0000 01110010 00000000Initial values0 RemainderDivisorQuotStepIter 16 Hardware for Division A comparison requires a subtract; the sign of the result is examined; if the result is negative, the divisor must be added back Efficient Division
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