Lecture Notes on Power Electronics, Slides of Power Electronics

Download Lecture Notes on Power Electronics and more Slides Power Electronics in PDF only on Docsity! VEER SURENDRA SAI UNIVERSITY OF TECHNOLOGY BURLA, ODISHA, INDIA DEPARTMENT OF ELECTRICAL ENGINEERING Lecture Notes on Power Electronics Subject code – BEE1602 6th Semester B.Tech. (Electrical Engineering) Disclaimer This document does not claim any originality and cannot be used as a substitute for prescribed textbooks. The information presented here is merely a collection by the committee members for their respective teaching assignments. Various sources as mentioned at the end of the document as well as freely available material from internet were consulted for preparing this document. The ownership of the information lies with the respective authors or institutions. Further, this document is not intended to be used for commercial purpose and the committee members are not accountable for any issues, legal or otherwise, arising out of use of this document. The committee members make no representations or warranties with respect to the accuracy or completeness of the contents of this document and specifically disclaim any implied warranties of merchantability or fitness for a particular purpose. The committee members shall be liable for any loss of profit or any other commercial damages, including but not limited to special, incidental, consequential, or other damages. MODULE - 1 POWER ELECTRONICS The control of electric motor drives requires control of electric power. Power electronics have eased the concept of power control. Power electronics signifies the word power electronics and control or we can say the electronic that deal with power equipment for power control. Main power source Ref signal Power electronics based on the switching of power semiconductor devices. With the development of power semiconductor technology, the power handling capabilities and switching speed of power devices have been improved tremendously. Power Semiconductor Devices The first SCR was developed in late 1957. Power semiconductor devices are broadly categorized into 3 types: 1. Power diodes (600V,4500A) 2. Transistors 3. Thyristors (10KV,300A,30MW) Thyristor is a four layer three junction pnpn semiconductor switching device. It has 3 terminals these are anode, cathode and gate. SCRs are solid state device, so they are compact, possess high reliability and have low loss. Control Circuit Digital Circuit Power Electronic circuit Load Feedback Signal SCR is made up of silicon, it act as a rectifier; it has very low resistance in the forward direction and high resistance in the reverse direction. It is a unidirectional device. Static V-I characteristics of a Thyristor The circuit diagram for obtaining static V-I characteristics is as shown Anode and cathode are connected to main source voltage through the load. The gate and cathode are fed from source 𝐸𝑆. A typical SCR V-I characteristic is as shown below: A forward voltage is applied between anode and cathode with gate circuit open.  Junction 𝐽1 and 𝐽3 is forward biased.  Juntion 𝐽2 is reverse biased.  As the anode to cathode voltage is increased breakdown of the reverse biased junction 𝐽2 occurs. This is known as avalanche breakdown and the voltage at which this phenomena occurs is called forward breakover voltage.  The conduction of current continues even if the anode cathode voltage reduces below 𝑉𝐵𝑂till 𝐼𝑎 will not go below𝐼ℎ. Where 𝐼ℎ is the holding current for the thyristor. 2. Gate triggering This is the simplest, reliable and efficient method of firing the forward biased SCRs. First SCR is forward biased. Then a positive gate voltage is applied between gate and cathode. In practice the transition from OFF state to ON state by exceeding 𝑉𝐵𝑂 is never employed as it may destroy the device. The magnitude of 𝑉𝐵𝑂, so forward breakover voltage is taken as final voltage rating of the device during the design of SCR application. First step is to choose a thyristor with forward breakover voltage (say 800V) higher than the normal working voltage. The benefit is that the thyristor will be in blocking state with normal working voltage applied across the anode and cathode with gate open. When we require the turning ON of a SCR a positive gate voltage between gate and cathode is applied. The point to be noted that cathode n- layer is heavily doped as compared to gate p-layer. So when gate supply is given between gate and cathode gate p-layer is flooded with electron from cathode n-layer. Now the thyristor is forward biased, so some of these electron reach junction 𝐽2 .As a result width of 𝐽2 breaks down or conduction at 𝐽2 occur at a voltage less than 𝑉𝐵𝑂.As 𝐼𝑔 increases 𝑉𝐵𝑂 reduces which decreases then turn ON time. Another important point is duration for which the gate current is applied should be more then turn ON time. This means that if the gate current is reduced to zero before the anode current reaches a minimum value known as holding current, SCR can’t turn ON. In this process power loss is less and also low applied voltage is required for triggering. 3. dv/dt triggering This is a turning ON method but it may lead to destruction of SCR and so it must be avoided. When SCR is forward biased, junction 𝐽1 and 𝐽3 are forward biased and junction 𝐽2 is reversed biased so it behaves as if an insulator is place between two conducting plate. Here 𝐽1 and 𝐽3 acts as a conducting plate and 𝐽2 acts as an insulator. 𝐽2 is known as junction capacitor. So if we increase the rate of change of forward voltage instead of increasing the magnitude of voltage. Junction 𝐽2 breaks and starts conducting. A high value of changing current may damage the SCR. So SCR may be protected from high 𝑑𝑣 𝑑𝑡 . 𝑞 = 𝑐𝑣 𝐼𝑎 = 𝑐 𝑑𝑣 𝑑𝑡 𝐼𝑎 𝛼 𝑑𝑣 𝑑𝑡 4. Temperature triggering During forward biased, 𝐽2 is reverse biased so a leakage forward current always associated with SCR. Now as we know the leakage current is temperature dependant, so if we increase the temperature the leakage current will also increase and heat dissipitation of junction 𝐽2occurs. When this heat reaches a sufficient value 𝐽2 will break and conduction starts. Disadvantages This type of triggering causes local hot spot and may cause thermal run away of the device. This triggering cannot be controlled easily. It is very costly as protection is costly. 5. Light triggering First a new recess niche is made in the inner p-layer. When this recess is irradiated, then free charge carriers (electron and hole) are generated. Now if the intensity is increased above a certain value then it leads to turn ON of SCR. Such SCR are known as Light activated SCR (LASCR). Some definitions: Latching current The latching current may be defined as the minimum value of anode current which at must attain during turn ON process to maintain conduction even if gate signal is removed. Holding current It is the minimum value of anode current below which if it falls, the SCR will turn OFF. Switching characteristics of thyristors The time variation of voltage across the thyristor and current through it during turn on and turn off process gives the dynamic or switching characteristic of SCR. Switching characteristic during turn on Turn on time It is the time during which it changes from forward blocking state to ON state. Total turn on time is divided into 3 intervals: 1. Delay time 2. Rise time 3. Spread time Delay time If 𝐼𝑔and 𝐼𝑎 represent the final value of gate current and anode current. Then the delay time can be explained as time during which the gate current attains 0.9 𝐼𝑔 to the instant anode current reaches 0.1 𝐼𝑔 or the anode current rises from forward leakage current to 0.1 𝐼𝑎. 1. Gate current 0.9 𝐼𝑔 to 0.1 𝐼𝑎. 2. Anode voltage falls from 𝑉𝑎 to 0.9𝑉𝑎. 3. Anode current rises from forward leakage current to 0.1 𝐼𝑎. A gate turn off thyristor is a pnpn device. In which it can be turned ON like an ordinary SCR by a positive gate current. However it can be easily turned off by a negative gate pulse of appropriate magnitude. Conventional SCR are turned on by a positive gate signal but once the SCR is turned on gate loses control over it. So to turn it off we require external commutation circuit. These commutation circuits are bulky and costly. So due to these drawbacks GTO comes into existence. The salient features of GTO are: 1. GTO turned on like conventional SCR and is turned off by a negative gate signal of sufficient magnitude. 2. It is a non latching device. 3. GTO reduces acoustic and electromagnetic noise. It has high switching frequency and efficiency. A gate turn off thyristor can turn on like an ordinary thyristor but it is turn off by negative gate pulse of appropriate magnitude. Disadvantage The negative gate current required to turn off a GTO is quite large that is 20% to 30 % of anode current Advantage It is compact and cost less Switching performance 1. For turning ON a GTO first TR1is turned on. 2. This in turn switches on TR2 so that a positive gate current pulse is applied to turn on the GTO. 3. Thyristor 𝑇1 is used to apply a high peak negative gate current pulse. Gate turn-on characteristics 1. The gate turn on characteristics is similar to a thyristor. Total turn on time consists of delay time, rise time, spread time. 2. The turn on time can be reduced by increasing its forward gate current. GATE TURN OFF Turn off time is different for SCR.Turn off characteristics is divied into 3 pd 1. Storage time 2. Fall time 3. Tail time Tq=ts+tf+tt At normal operating condition gto carries a steady state current.The turn off process starts as soon as negative current is applied after t=0. STORAGE TIME During the storagepd the anode voltage and current remains constant.The gate current rises depending upon the gate circuit impedance and gate applied voltage.The beginning of pd is as soon as negative gate current is applied.The end of storage pd is marked by fall in anode current and rise in voltage,what we have to do is remove the excess carriers.the excess carriers are removed by negative carriers. 5.Its operation is similar to two devices connected in anti parallel with common gate connection. 6.It has 3 terminals MT1,MT2 and gate G Its use is control of power in ac. POWER BJT Power BJT means a large voltage blocking in the OFF state and high current carrying capability in the ON state. In most power application, base is the input terminal. Emitter is the common terminal. Collector is the output terminal. SIGNAL LEVEL OF BJT n+ doped emitter layer ,doping of base is more than collector.Depletion layer exists more towards the collector than emitter POWER BJT CONSTRUCTION The maxium collector emitter voltage that can be sustained across the junction, when it is carrying substantial collector current. Vceo=maxium collectorand emitter voltage that can be sustain by the device. Vcbo=collector base breakdown voltage with emitter open PRIMARY BREAKDOWN It is due to convention avalanche breakdown of the C-B junction and its associated large flow of current.The thickness of the depletion region determines the breakdown voltage of the transistor.The base thickness is made as small as possible,in order to have good amplification capability. If the thickness is too small, the breakdown voltage is compromised.So a compromise has to be made between the two. THE DOPING LEVELS- 1.The doping of the emitter layer is quite large. 2.The base doping is moderate. 3.n- region is lightly doped. 4.n+ region doping level is similar to emitter. 1.THICKNESS OF DRIFT REGION- It determines the breakdown length of the transistor. 2.THE BASE THICKNES – Small base thickness- good amplification capability Too small base thickness- the breakdown voltage of the transistor has ti be compromised. For a relatively thick base,the current gain will be relatively small.so it is increase the gain.Monolithicesigns for darlington connected BJT pair have been deveploed. SECONDARY BREAKDOWN Secondary breakdown is due to large power disspation at localized site within the semi conductor. PHYSICS OF BJT OPERATION- The transistor is assumed to operate in active region. There is no doped collector drift region. It has importance only in switching operation, in active region of operation. B-E junction is forward biased and C-B junction is reverse biased. Electrons are injected into base from the emitter. Holes are injected from base into the emitter. QUASI SATURATION- Intially we assume that, the transistor is in active region. Base current is allowed to increase then lets see what happens.first collector rises in response to base current.So there is a increase voltage drop across the collector load.So C-E voltage drops. Because of increase in collector current, there is a increase in voltage in drift region. This eventually reduces the reverse biased across the C-B junction.so n-p junction get smaller, at some point the junction become forward bised. So now injection of holes from base into collector drift region occurs. Charge neutrality requires the electron to be injected in the drift region of the holes. From where these electron came. Since a large no of electron is supplied to the C-B junction via injection from emitter and subsequent diffusion across the base. As excess carrier build up in the drift region begins to occur quasi saturation region is entered. As the injected carrires increase in the drift region is When surge condition over voltage clamping device returns to high resistance state. e.g. of voltage clamping device 1.Seleniumthyrector diodes 2.Metal Oxide varistors 3.Avalanche diode supressors OVER CURRENT PROTECTION Long duration operation of SCR, during over current causes the 1.junction temp. of SCR to rise above the rated value,causing permanent damage to device. SCR is protected from overcurrent by using 1.Circuit breakers 2.Fast acting fuses Proper co-ordination is essential because 1..fault current has to be interrupted before SCR gets damaged. 2.only faulty branches of the network has to be replaced. In stiff supply network,source has negligible impedance.So in such system the magnitude and rate of rise of current is not limited.Fault current hence junction temp rises in a few miliseconds. POINTS TO BE NOTED- 1. Proper coordination between fast acting fuse and thyristor is essential. 2. The fuse is always rated to carry marginal overload current over definite period. 3. The peak let through current through SCR must be less than sub cycle rating of the SCR. 4. The voltage across the fuse during arcing time is called arcing or recovery voltage and is equal to sum of the source voltage and emf induced in the circuit inductance during arcing time. 5. On abrupt interruption of fuse current, induce emf would be high, which results in high arcing voltage. Circuit Breaker (C.B) C.B. has long tripping time. So it is used for protecting the device against continuous overload current or against the surge current for long duration. In order that fuse protects the thyristor realiably the 𝐼2𝑡 rating of fuse current must be less than that of SCR. ELECTRONIC CROWBAR PROTECTION For overcurrent protection of power converter using SCR, electronic crowbar are used. It provide rapid isolation of power converter before any damage occurs. HEAT PROTECTION- To protect the SCR 1. From the local spots 2. Temp rise SCRs are mounted over heat sinks. GATE PROTECTION- Gate circuit should also be protected from 1. Overvoltages 2. Overcurrents Overvoltage across the gate circuit causes the false triggering of SCR Overcurrent raise the junction temperature. Overvoltage protection is by zener diode across the gate circuit. INSULATED GATE BIPOLAR TRANSISTOR(IGBT)- BASIC CONSTRUCTION- The n+ layer substrate at the drain in the power MOSFET is substituted by p+ layer substrate and called as collector. When gate to emitter voltage is positive,n- channel is formed in the p- region.This n- channel short circuit the n- and n+ layer and an electron movement in n channel cause hole injection from p+subtrate layer to n- layer. Fig. a Fig. b. Fig. c Fig. a (Circuit diagram for obtaining V-I characteristics) Fig. b (Static V-I characteristics) Fig. c (Transfer characteristic) Switching characteristics: Figure below shows the turn ON and turn OFF characteristics of IGBT Turn on time Time between the instants forward blocking state to forward on -state . Turn on time = Delay time + Rise time Delay time = Time for collector emitter voltage fall from 𝑉𝐶𝐸 to 0.9𝑉𝐶𝐸 𝑉𝐶𝐸=Initial collector emitter voltage 𝑡𝑑𝑛=collector current to rise from initial leakage current to 0.1Ic Ic= Final value of collector current Rise time Collector emitter voltage to fall from 0.9𝑉𝐶𝐸 to 0.1𝑉𝐶𝐸 . 0.1Ic to Ic After 𝑡𝑜𝑛 the device is on state the device carries a steady current of Ic and the collector emitter voltage falls to a small value called conduction drop 𝑉𝐶𝐸𝑆. Turn off time 1) Delay time 𝑡𝑑𝑓 2) Initial fall time 𝑡𝑓1 3) Final fall time 𝑡𝑓2 𝑡𝑂𝑓𝑓 =𝑡𝑑𝑓 + 𝑡𝑓1+ 𝑡𝑓2 𝑡𝑑𝑓 = Time during which the gate emitter voltage falls to the threshold value 𝑉𝐺𝐸𝑇. Collector current falls from Ic to 0.9Ic at the end of the 𝑡𝑑𝑓 collector emitter voltage begins to rise. Turn off time = Collector current falls from 90% to 20% of its initial value Ic OR The time during which collector emitter voltage rise from 𝑉𝐶𝐸 to 0.1𝑉𝐶𝐸. 𝑡𝑓2 = collector current falls from20% to 10% of Ic. During this collector emitter voltage rise 0.1𝑉𝐶𝐸 to final value of 𝑉𝐶𝐸. Series and parallel operation of SCR SCR are connected in series for h.v demand and in parallel for fulfilling high current demand. Sting efficiency can be defined as measure of the degree of utilization on SCRs in a string. String efficiency < 1. Derating factor (DRF) 1 – string efficiency. If DRF more then no. of SCRs will more, so string is more reliable. Let the rated blocking voltage of the string of a series connected SCR is 2𝑉1 as shown in the figure below, But in the string two SCRs are supplied a maximum voltage of 𝑉1+𝑉2. 𝜂 = 𝑉1 + 𝑉2 2𝑉1 Significance of string efficiency . Two SCRs are have same forward blocking voltage ,When system voltage is more then the voltage rating of a single SCR. SCRs are connected in series in a string. There is a inherent variation in characteristics. So voltage shared by each SCR may not be equal. Suppose, SCR1 leakage resistance > SCR2 leakage resistance. For same leakage current 𝐼0 in the series connected SCRs. For same leakage current SCR1 supports a voltage 𝑉1 , SCR2 supports a voltage 𝑉2, So string 𝜂 for two SCRs = 𝑉1+𝑉2 2𝑉2 = 1 2 (1 + 𝑉2 𝑉1 ) < 1 . So, 𝑉1 > 𝑉2, The above operation is when SCRs are not turned ON. But in steady state of operation , A uniform voltage distribution in the state can be achieved by connect a suitable resistance across each SCRs , so that parallel combination have same resistance. But this is a cumbersome work. During steady state operation we connect same value of shunt resistance across each SCRs. This shunt resistance is called state equalizing circuit. Suppose, * Under transient condition equal voltage distribution can be achieved by employing shunt capacitance as this shunt capacitance has the effect of that the resultant of shunt and self capacitance tend to be equal. The capacitor is used to limits the dv/dt across the SCR during forward blocking state. When this SCR turned ON capacitor discharges heavy current through the SCR . The discharge current spike is limited by damping resistor 𝑅𝑐 . 𝑅𝑐 also damps out high frequency oscilation that may arise due to series combination of 𝑅𝑐 ,C and series inductor . 𝑅𝑐 & C are called dynamic equalizing circuit Diode D is used during forward biased condition for more effective charging of the capacitor. During capacitor discharge 𝑅𝑐 comes into action for limiting current spike and rate of change of current di/dt . The R, 𝑅𝑐 & C component also provide path to flow reverse recovery current. When one SCR regain its voltage blocking capability. The flow of reverse recovery current is necessary as it facilitates the turning OFF process of series connected SCR string. So C is necessary for both during turn ON and turn OFF process. But the voltage unbalance during turn OFF time is more predominant then turn ON time. So choice of C is based on reverse recovery characteristic of SCR . SCR 1 has short recovery time as compared to SCR 2. Δ𝑄 is the difference in reverse recovery charges of two SCR 1 and SCR 2. Now we assume the SCR 1 recovers fast . i.e it goes into blocking state so charge Δ𝑄 can pass through C . The voltage induced by 𝑐1 is 𝛥𝑄/C , where is no voltage induced across 𝐶2 . The difference in voltage to which the two shunt capacitor are charged is 𝛥𝑄/C . Now thyristor with least recovery time will share the highest transient voltage say 𝑉𝑏𝑚, So, 𝑉𝑏𝑚 - 𝑉2 = Δ𝑄/C So, 𝑉2= 𝑉𝑏𝑚 - Δ𝑄/C As 𝑉1 = 𝑉𝑏𝑚 𝑉𝑆 = 𝑉1+𝑉2 = 𝑉𝑏𝑚+(𝑉𝑏𝑚 - Δ𝑄/C) 𝑉𝑆 = 2𝑉𝑏𝑚-Δ𝑄/C ⇒ 1 2 (𝑉𝑠 + Δ𝑄 𝐶 ) = 𝑉𝑏𝑚 ⇒ 𝑉2= 𝑉𝑏𝑚 - Δ𝑄/C 1 2 [𝑉𝑠 - Δ𝑄/C] Now suppose that there are n series SCRs in a string. Let us assume that if top SCR has similar to characteristic SCR 1. Then SCR 1 would support a voltage 𝑉𝑏𝑚 * If the remaining (n-1) SCR has characteristic that of SCR 2 .Then SCR 1 would recover first and support a voltage 𝑉𝑏𝑚 . The charge (n-1) Δ𝑄 from the remaining (n - 1) SCR would pass through C. 𝑉1 = 𝑉𝑏𝑚 𝑉2 = 𝑉𝑏𝑚 - Δ𝑄/C Voltage across (n-1) slow thyristors 𝑉 = (n-1) (𝑉𝑏𝑚 - Δ𝑄/C) So, 𝑉𝑆 = V1+(n-1) 𝑉2 = 𝑉𝑏𝑚 + (n-1) (𝑉𝑏𝑚 - Δ𝑄/C) By simplifing we get , 𝑉𝑏𝑚 = 1 𝑛 [𝑉𝑠+(n-1) Δ𝑄/C ] C =[ (n-1) Δ𝑄/( n𝑉𝑏𝑚 -𝑉𝑆) 𝑉2 = (𝑉𝑆 - Δ𝑄/C )/ n . Parallel operation: When current required by the load is more than the rated current of single thyristor , SCRs are connected in parallel in a string . MODULE-II RECTIFIER Rectifier are used to convert A.C to D.C supply. Rectifiers can be classified as single phase rectifier and three phase rectifier. Single phase rectifier are classified as 1-Փ half wave and 1-Փ full wave rectifier. Three phase rectifier are classified as 3-Փ half wave rectifier and 3-Փ full wave rectifier. 1-Փ Full wave rectifier are classified as1-Փ mid point type and 1-Փ bridge type rectifier. 1-Փ bridge type rectifier are classified as 1-Փ half controlled and 1-Փ full controlled rectifier. 3-Փ full wave rectifier are again classified as 3-Փ mid point type and 3-Փ bridge type rectifier. 3-Փ bridge type rectifier are again divided as 3-Փ half controlled rectifier and 3-Փ full controlled rectifier. Single phase half wave circuit with R-L load Output current 𝑖𝑜 rises gradually. After some time 𝑖𝑜 reaches a maximum value and then begins to decrease. At π, 𝑣𝑜=0 but 𝑖𝑜 is not zero because of the load inductance L. After π interval SCR is reverse biased but load current is not less then the holding current. At β>π, 𝑖𝑜 reduces to zero and SCR is turned off. At 2π+β SCR triggers again α is the firing angle. β is the extinction angle. v conduction angle    Analysis for 𝑉𝑇 . At 𝜔𝑡 = 𝐼,𝑉𝑇 = 𝑉𝑚𝑠𝑖𝑛𝐼 During = 𝐼 𝑡𝑜 𝐼 , 𝑉𝑇 = 0; When = 𝐼 , 𝑉𝑇 = 𝑉𝑚𝑠𝑖𝑛𝐼; 0 0sinm di V t Ri L dt    2 2 sin( t )m s V i R X     Where, 1tan X R   X L Where 𝐼 is the angle by which 𝐼𝑠 lags 𝑉𝑠. The transient component can be obtained as 0 0t di Ri L dt   So 𝑖𝑡 = 𝐴𝑒−(𝑅𝑡 𝐿)⁄ 𝑖0 = 𝑖𝑠 + 𝑖𝑡 𝑉𝑚 𝑧 sin( 𝜔𝑡 − 𝐼) + 𝐴𝑒−(𝑅𝑡 𝐿)⁄ Where 𝑧 = √𝑅2 + 𝑋2 At 𝛼 = 𝜔𝑡, 𝑖𝑜 = 0; 0 = 𝑉𝑚 𝑧 sin( 𝛼 − 𝐼) + 𝐴𝑒−(𝑅𝛼 𝐿𝜔)⁄ ; 𝐴 = −𝑉𝑚 𝑧 sin( 𝛼 − 𝐼)𝑒(𝑅𝛼 𝐿𝜔)⁄ 𝑖𝑜 = 𝑉𝑚 𝑧 sin( 𝜔𝑡 − 𝐼) − 𝑉𝑚 𝑧 sin( 𝛼 − 𝐼)𝑒−𝑅(𝜔𝑡−𝛼) 𝐿𝜔⁄ sin( )mV t E  So, 1 1 sin m E V   Maximum value of firing angle 2 2    The voltage differential equation is 0 0sin( )m di V t Ri L E dt     1 2s s si i i  Due to source volt 1 sin( )m s V i t Z    Due to DC counter emf 2 ( / )si E R  ( / )R L t ti Ae Thus the total current is given by 1 2s s ti i i  (R/L) tsin( )mV E t Ae Z R       (R/L) t 0 sin( )m s V E i t Ae Z R       0  0At t i    [ sin( )]e R LmVE A R Z        So { ( )} { ( 0 [sin( ) sin( ) [1 ] R R t t m L L V E i t e e Z R                     Average voltage across the inductance is zero. Average value of load current is 0 1 I ( sin )d( ) 2 mV t E t R        1 [ (cos cos )] 2 mV R          Conduction angle     v    0 1 I [ (cos cos( ) )] 2 mV v v R        cos cosB 2sin sin 2 2 A B A B A     So 0 1 I [2 sin( )sin . ] 2 2 2 m v v V E R       0E I R   1 E [2 sin( )sin . ] 2 2 2 m v v V E       E(1 ) [ sin( )sin ] 2 2 2 mVv v v        If load inductance L is zero then 2  And 2v        But 2 1    So 2 1      And 1v      So average current will be 0 1 1 1 I [ (cos cos( )) ( )] 2 mV E R              So V0=E+I0R 1 1(cos cos ) (1 ) 2 2 mV E            For no inductance rms value of load current  2 1/2 0 2 1 I [ ( sin( ) ) ] 2 mV t E d t R          Power delivered to load 2 0orP I R I E  Supply power factor 2 0or s or I R I E Pf V I   Single phase full wave converter: steady state analysis 0 s o di V Ri L E dt    0 0V RI E  0 2 cosmV V    So in case of DC motor load 0 a a m mV r I    So 2 cosm a a m m V r I     m aT I e a m T I    Put e a m T I   So 2 2 ( )cosm a e m m m V r T       MODULE - III CHOPPER A chopper is a static device that converts fixed DC input voltage to variable output voltage directly. Chopper are mostly used in electric vehicle, mini haulers. Chopper are used for speed control and braking. The systems employing chopper offer smooth control, high efficiency and have fast response. The average output voltage is 1 0 1 1 0 1 1 (t ) t a s s sV V dt V ft V V T T     The average load current a s a V V I R R    Where, T=chopping period Duty cycle of chopper = 1t T   f=chopping frequency The rms value of output voltage is 1 2 2 0 0 0 1 ( ) sV V dt V T    If we consider the converter to be loss less then the input power is equal to the output power and is given by Both the switches never switch ON simultaneously as it lead direct short circuit of the supply. Now when sw2 is closed or FD is on the output voltage V₀ is zero. When sw1 is ON or diode D conducts output voltage is V₀ is +Vs’ CURRENT ANANLYSIS: When CH1 is ON current flows along i0. When CH1 is off current continues to flow along i0 as FD is forward biased. So i0 is positive. Now when CH2 is ON current direction will be opposite to i0. When sw2 is off D2 turns ON. Load current is –i0. So average load voltage is always positive. Average load current may be positive or negative. TWO QUADRANT TYPE B CHOPPER, OR TYPE D CHOPPER: When CH1 and CH2 both are on then V0=Vs. When CH1 and CH2 are off and D1 and D2 are on V 0=-Vs. The direction of current is always positive because chopper and diode can only conduct in the direction of arrow shown in fig. Average voltage is positive when Ton>Toff FOUR QUADRANT CHOPPER, OR TYPE E CHOPPER FIRST QUADRANT: CH4 is kept ON CH3 is off CH1 is operarted V0=Vs i0 = positive when CH1 is off positive current free wheels through CH4,D2 so V0 and I2 is in first quadrant. SECOND QUADRANT: CH1,CH3,CH4 are off. CH2 is operated. Reverse current flows and I is negative through L CH2 D4 and E. When CH2 off D1 and D4 is ON and current id fed back to source. So di E L dt  is more than source voltage Vs. As i0 is negative and V0 is positive, so second quadrant operation. THIRD QUADRANT: CH1 OFF, CH2 ON CH3 operated. So both V0 and i0 is negative. When CH3 turned off negative current freewheels through CH2 and D4. FOURTH QUADRANT: As a sV V so s a V I R   2 2 s a V I R   So equation 4 gives (1 ) 2 c R L f   Which is the critical value of inductor 2c aV V  2 (1 ) 2 2 8 s a s V V V Lcf       2 1 16 c Lf   Peak to peak ripple voltage of capacitor: ( 0)c c cV V V t    1 1 1 0 0 1 1t t a c a I t I dt I c c c     So 1 a s af V V t V   1 a s af V V t V   1 s a V V    11 s a Vt T V    1 a s a V V t V f    So ( )a a s c af I V V V c V    a c I V fc    Condition for continuous imductor current and capacitor voltage: If IL= average inductor current then 2 L I I   2 2 2 (1 ) s s L a V V I I I fL R         As 1 s a V V    2 2 (1 ) R s a V I     So 2 2 2 (1 ) s s L L a V V I I I R fL         (1 ) 2 c a R L f     2c aV V  2 2a a a I V I R cf    2 c fR   So if 𝑉0 = ∑ 2𝑉𝑆 𝑛𝜋 sin(𝑛𝑤𝑡)∞ 𝑛=1,3,5… =∑ 2𝑉𝑆 𝑛𝜋√𝑅2+(𝑛𝜔𝐿)2 ∞ 𝑛=1,3,5…. sin (𝑛𝜔𝑡 − 𝜃𝑛) 𝑃01 = (𝐼01)2𝑅 = [ 2𝑉𝑆 √2𝜋√𝑅2+(𝜔𝐿)2 ]2R DC Supply Current Assuming a lossless inverter, the ac power absorbed by the load must be equal to the average power supplied by the dc source. ∫ 𝑖𝑠(𝑡)𝑑𝑡 = 1 𝑉𝑠 𝑇 0 ∫ √2𝑉01 sin(𝜔𝑡) √2𝐼0 sin(𝜔𝑡 − 𝜃1) 𝑑𝑡 𝑇 0 =𝐼𝑆 𝑉01 =Fundamental rms output output voltage 𝐼0=rms load current 𝜃1=the load angle at the fundamental frequency Single phase full bridge inverter For n=1, 𝑉1 = 4𝑉𝑆 √2𝑉𝑆 =0.9𝑉𝑆 (The rms of fundamental) Instantaneous load current 𝑖0 for an RL load 𝑖0 = ∑ 4𝑉𝑆 𝑛𝜋√𝑅2+(𝑛𝜔𝐿)2 ∞ 𝑛=1,3,5… sin(n𝜔𝑡 − 𝜃𝑛) 𝜃𝑛=tan−1( 𝑛𝜔𝐿 𝑅 ) The rms output voltage is 𝑉0=( 2 𝑇0 ∫ 𝑉𝑆 2 𝑇 2⁄ 0 ) 1 2⁄ =𝑉𝑆 The instantaneous output voltage in a fourier series 𝑣0 = ∑ 4𝑉𝑆 𝑛𝜋 ∞ 𝑛=1,3,5… sin (𝑛𝜔𝑡) Single phase bridge inverter INVERTER Inverters are of the two types 1) VSI 2) CSI Pulse width model The VSI can be further divided into general 3 categories: 1.Pulse width modulated inverters 2.Square wave inverters 3.Single phase inverter with voltage cancellation Pulse width modulated inverters The input dc voltage is of constant magnitude . The diode rectifier is used to rectify the line voltage.The inverter control the magnitude and frequency of the ac output voltage. This is achieved by PWM technique of inverter switches and this is called PWM inverters. The sinusoidal PWM technique is one of the PWM technique to shape the output voltage to as close as sinusoidal output. Basic concepts of switch mode inverter When 𝑉𝑐𝑜𝑛𝑡𝑟𝑜𝑙 > 𝑉𝑡𝑟𝑖 𝑇𝐴 + is ON 𝑉𝐴𝑂 = 1 2 𝑉𝑑 𝑉𝑐𝑜𝑛𝑡𝑟𝑜𝑙 < 𝑉𝑡𝑟𝑖 𝑇𝐴 − is ON 𝑉𝐴𝑂 = 1 2 𝑉𝑑 So the following inferences can be drawn The peak amplitude of fundamental frequency is matimes 1 2 𝑉𝑑 𝑉𝐴𝑂=𝑚 𝑎 𝑉𝑑 2 𝑉𝐴𝑂= 𝑉𝑐𝑜𝑛𝑡𝑟𝑜𝑙 𝑉𝑡𝑟𝑖 ∗ 𝑉𝑑 2 𝑉𝑐𝑜𝑛𝑡𝑟𝑜𝑙 ≤ ?̂?𝑡𝑟𝑖 The foregoing arguments shown why Vcontrolis chosen to be sinusoidal to provide sinusoidal output voltage with fewer harmonics Let the Vcontrol vary sinusoidal with frequency f1,which is the desired frequency of the inverter output voltage. Let Vcontrol=V̂controlsin𝜔1t V̂control ≤ V̂tri ?̂?𝑡𝑟𝑖 𝑡1 = 𝑉𝑡𝑟𝑖 𝑇𝑠 4⁄ At t=𝑡1 , 𝑣𝑡𝑟𝑖=𝑣𝑐𝑜𝑛𝑡𝑟𝑜𝑙 So 𝑣𝑐𝑜𝑛𝑡𝑟𝑜𝑙 𝑡1 = 𝑉𝑡𝑟𝑖 𝑇𝑠 4⁄ 𝑡1= ?̂?𝑐𝑜𝑛𝑡𝑟𝑜𝑙 𝑉𝑡𝑟𝑖 * 𝑇𝑆 4 𝑇𝑜𝑛=2𝑡1+ 𝑇𝑆 2 𝐷1= 𝑇𝑜𝑛 𝑇𝑠 = 2𝑡1+ 𝑇𝑆 2 2 = 1 2 + 2𝑡1 𝑇𝑠 𝐷1= 1 2 + 1 2 ( ?̂?𝑐𝑜𝑛𝑡𝑟𝑜𝑙 𝑉𝑡𝑟𝑖 ) Three phase inverter When three single-phase inverters are connected in parallel a three phase inverter is formed. The gating signal has to be displaced by 1200 with respect to each other so as achieve three phase balanced voltages. A 3-phase output can be achieved from a configuration of six transistors and six diodes. Two type of control signal can be applied to transistors, they are such as 1800 or 1200 conduction. 180-degree conduction When 𝑄1 is switched on, terminal a is connected to the positive terminal of dc input voltage. When 𝑄4 is switched on terminal a is brought to negative terminal of the dc source. There are 6 modes of operation is a cycle and the duration of each mode is 600. The conduction sequence of transistors is 123,234,345,456,561,612. The gating signals are shifted from each other by 600 to get 3-𝜑 balanced voltages. Switching states for the three phase voltage inverters 𝑉 𝑌𝐵=∑ 4𝑉𝑆 𝑛𝜋 𝑠𝑖𝑛 𝑛𝜋 3 sin 𝑛(𝜔𝑡−𝜋 2⁄ )∞ 𝑛=1,3,5… 𝑉 𝐵𝑅=∑ 4𝑉𝑆 𝑛𝜋 𝑠𝑖𝑛 𝑛𝜋 3 sin 𝑛(𝜔𝑡−𝜋 6⁄ )∞ 𝑛=1,3,5… All even harmonics are zero all triple n harmonics are zero. The rms nth component of the line voltage is = 4𝑉 √2𝑛𝜋 sin 𝑛𝜋 3 = 4𝑉 √2𝜋 sin(60) For n=1 =0.7797𝑉𝑆 Three phase 1200mode VSI The circuit diagram is same as that for 1800 mode of conduction. Here each thyristor conducts for 1200.There are 6 steps each of 600 duration, for completing one cycle of ac output voltage. 6,1 1,2 2,3 3,4 4,5 5,6 Step 1: 6,1 conducting 𝑉𝑎𝑛 = 𝑉𝑆 2 , 𝑉𝑦𝑛 = −𝑉𝑆 2 , 𝑉𝑐𝑛=0 Step 2: 1,2 conducting 𝑉𝑎𝑛 = 𝑉𝑆 2 , 𝑉𝑏𝑛 = 0, 𝑉𝑐𝑛= −𝑉𝑆 2 Step 3: 2,3 conducting 𝑉𝑎𝑛 =0, 𝑉𝑏𝑛= 𝑉𝑆 2 , 𝑉𝑐𝑛= −𝑉𝑆 2 Step 4: 3,4 conducting 𝑉𝑎𝑛 = −𝑉𝑆 2 , 𝑉𝑏𝑛= 𝑉𝑆 2 , 𝑉𝑐𝑛=0 Step 5: 4,5 conducting 𝑉𝑎𝑛== −𝑉𝑆 2 , 𝑉𝑦𝑛 = 0, 𝑉𝑏𝑛 = 𝑉𝑆 2 Step 6: 5,6 conducting 𝑉𝑎𝑛=0, 𝑉𝑏𝑛 = −𝑉𝑆 2 , 𝑉𝑐𝑛= 𝑉𝑆 2 1200 conduction mode Step Thyristor conducting 𝑉𝑅𝑛 𝑉𝑌𝑛 𝑉𝐵𝑛 V → 1 6,1 Vs 2 ⁄ −𝑉𝑠 2 ⁄ 0 √3VS 2 (−300) 2 1,2 𝑉𝑠 2 ⁄ 0 −𝑉𝑠 2 ⁄ √3VS 2 (300) 3 2,3 0 𝑉𝑠 2 ⁄ −𝑉𝑠 2 ⁄ √3VS 2 (900) 4 3,4 −𝑉𝑠 2 ⁄ 𝑉𝑠 2 ⁄ 0 √3VS 2 (1500) 5 4,5 −𝑉𝑠 2 ⁄ 0 𝑉𝑠 2 ⁄ √3V 2 (2100) 6 5,6 0 −𝑉𝑠 2 ⁄ 𝑉𝑠 2 ⁄ √3V 2 (−300)