Download Memory Hierarchy: Understanding the Organization and Principles of Computer Memory and more Study notes Computer Architecture and Organization in PDF only on Docsity! 1 Memory Hierarchy CS 333 Fall 2006 Reading Assignment • Read Chapter 7 – Sections 7.1, 7.4 Outline • Why? • How? • What? Why Have A Memory Hierarchy? • Infinite storage • Fast • Cheap • Compact • Cold – Pentium 4 2 Ghz: 75 watts! • Non-volatile (can remember w/o electricity) Want to create this illusion of large memory at small memory speeds Can’t have everything: •Bigger → Slower (speed of light) •Faster, denser → hotter •Faster → More expensive Memory Technology $0.50 - $25,000,000 – 20,000,000 ns (5-20 ms) Magnetic Disk $100 - $20050-70 nsDRAM $4000-$10,0000.5 – 5 nsSRAM $ per GB (2004) Typical Access Time Memory Technology How Can We Achieve the Ideal? • Create an illusion • Principles – Temporal locality – locality in time • If item was referenced recently, it will likely be referenced again soon. – Spatial locality – locality in space • If an item is referenced, items near it might be referenced soon • 80/20 rule – 80% of the time is spent executing 20% of the code Programs exhibit these qualities 2 Library Analogy • Desk (Registers) • Bookshelf (L1 cache) • Library (L2 cache) • Inter-library loan (main memory) • Temporal locality – bring a book to your desk, likely use it again soon • Spatial locality – looking up a particular topic at the library, books nearby are possibly relevant Programs and Locality • Instructions – Generally executed sequentially (high spatial locality) • Data – arrays (spatial) – records (spatial) What is the Memory Hierarchy? registers on-chip L1 cache (SRAM) main memory (DRAM) local secondary storage (local disks) Larger, slower, and cheaper (per byte) storage devices remote secondary storage (distributed file systems, Web servers) Local disks hold files retrieved from disks on remote network servers. Main memory holds disk blocks retrieved from local disks. off-chip L2 cache (SRAM) L1 cache holds cache lines retrieved from the L2 cache memory. CPU registers hold words retrieved from L1 cache. L2 cache holds cache lines retrieved from main memory. L0: L1: L2: L3: L4: L5: Smaller, faster, and costlier (per byte) storage devices Memory System Organization • Levels closer to the processor are subsets of levels further away • ALL data is stored at the lowest level • Data is copied between two adjacent levels Processor Upper level Lower level Block Terminology • Block – aka line, minimum unit of information • Hit – data is found in upper level – Hit rate – fraction of memory accesses that are found in upper level – Hit time – time to access the upper level • time to determine if it’s a hit + time to access data • Miss – Miss rate - (1 – hit rate) fraction not found in upper level – Miss penalty – Time to replace a block in upper level with corresponding block in lower level + time to deliver block to the processor
