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Memory Issues - Computer Architecture I - Syllabus | CS 470, Lab Reports of Computer Science

Material Type: Lab; Professor: Bistriceanu; Class: Computer Architecture I - Syllabus; Subject: Computer Science; University: Illinois Institute of Technology; Term: Unknown 1996;

Typology: Lab Reports

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Download Memory Issues - Computer Architecture I - Syllabus | CS 470 and more Lab Reports Computer Science in PDF only on Docsity! © 1996, Virgil Bistriceanu Memory Issues Objectives After completing this lab you will: • have a better understanding of why memory alignment is required • know what is the difference between Big Endian and Little Endian • know how to use in MIPS assembly programs data of sizes other than word Introduction As long as the compiler generates code, the programmer may be completely unaware of the layout of data and instructions in memory. The two questions we address in this lab are: • Can data and instructions be stored in memory at any address? This is the memory alignment problem. • When a data object larger than a byte is stored in memory, at what addresses are stored in the individual bytes of that object? This is the Big Endian versus Little Endian memory model problem. Memory alignment An object (data or instruction) with the size 2n bytes is said to be aligned in memory if it is stored in at an address which is a multiple of 2n. Since a multiple of 2n number has the least significant n bits zero, we can also say that an object of size 2n is memory aligned if it is stored at an address whose least significant n bits are zero. The alignment requirement for data and instructions in MIPS (as well as in other RISC architectures) is directly related to performance. An unaligned object in memory may require multiple memory accesses and/ or special processing. As the next figure shows, an unaligned word in memory requires two memory accesses Object Size (bytes) Store at address byte 1 = 20 any address half-word 2 = 21 multiple of 2 word 4 = 22 multiple of 4 double 8 = 23 multiple of 8 5 © 1996, Virgil Bistriceanu to be fetched and extra operations to be aligned in a register: the three bytes of the word read from address 0x400001 must be left shifted one byte, then the byte read from address 0x400004 merged on the least significant position. All this extra work would make the instruction execute slower. Big Endian v. Little Endian When data larger than a byte is stored in memory there are two possible layouts for the individual bytes as shown in the following figure where an integer (size = word) with the value 0x56789abc is stored at address 0x400000.If the most significant byte of the data object is stored at a smaller address than the least significant byte, then the layout is called Big Endian. If the most significant byte is stored at a higher address than the least significant byte, then the layout is called Little Endian. MIPS CPUs can use either memory model. The specific model is selected at the reset time. The layout model can not change dynamically (while programs are running). The SPIM simulator uses the memory model of the machine it is running on. If the simulator runs on a Little Endian machine then the memory model the user sees is Little Endian. If the simulator runs on a Big Endian machine then the memory model the user sees is Big Endian. 0x400000 0x400001 0x400004 Unaligned word stored at address 0x400001 0x400000 Aligned word stored at address 0x400000 0x400000 0x400001 0x56 0x78 0x9a 0xbc 0xbc 0x9a 0x78 0x56 0x400000 Big Endian layout for the integer 0x56789abc Little Endian layout for the integer 0x56789abc Laboratory 5: Prelab Memory Issues © 1996, Virgil Bistriceanu Q 4: How many bytes are wasted due to alignment in program lab5.2.asm? Step 4 Modify lab5.1.asm as follows: • include the directive .align 0 right before ‘char1’ • in main load word1 from memory in register $t0 Save this program as lab5.3.asm. Step 5 Load lab5.3.asm in the simulator and look in the data segment to see where data has been stored. Fill out the following table. In the ‘Multiple of’ column of the table indicate what power of two the address is a multiple of. In the ‘Displacement’ column’ indicate what is the displacement of the data object from the beginning of the data segment. Q 5: Based on the way data has been stored in the data segment, do you think data is aligned or not in memory? wasted_bytes = Name Data size (bytes) Address Multiple of Displacement (bytes) char1 double1 char2 half1 char3 word1 char4 Laboratory 5: Prelab Memory Issues © 1996, Virgil Bistriceanu Explain why. Q 6: How many bytes have been wasted due to alignment? Step 6 Run lab5.3.asm. You will get an error message. Write it down. Q 7: Why does the simulator report an error? Step 7 Modify lab5.1.asm as indicated below. • start the text segment at address 0x400001 instead of the default value. Save the new program as lab5.4.asm. wasted_bytes = Laboratory 5: Prelab Memory Issues © 1996, Virgil Bistriceanu Step 8 Load lab5.4.asm. Write down the first error message you obtain Q 8: Why does the simulator report an error? Laboratory 5: Inlab Memory Issues © 1996, Virgil Bistriceanu Q 1: Why are $t2 and $t6 different even if they have been loaded with data from the same address? Q 2: Based on the content of registers can you decide whether the SPIM simulator uses a Big Endian or Little Endian memory model? Which one? Step 4 Use lab4.2.asm as a template to create lab5.6.asm using the following description. • prompts the user to enter an integer; store the integer in memory in a variable called user1 • calls a procedure named ‘Reverse_bytes’. The argument passed to the procedure is the address of the word whose bytes must be reversed. The most significant byte will become the least significant and so on. • prints a message that reads “If bytes were layed in reverse order the number would be: ” • prints the number whose bytes have been reversed Run the program using the next test plan. Enter the last four digits of your SSN in the bolded row of the table. Test plan for lab5.6.asm Integer Output 0 0 -1 -1 1 16777216 16777216 Laboratory 5: Postlab Memory Issues © 1996, Virgil Bistriceanu Laboratory 5: Postlab Date Section Name Handling Unaligned Data in MIPS The MIPS architecture provides instructions that can be used to handle unaligned data. Loading an unaligned word from memory will require at least two instructions, one to get the upper part of the data and another one for the lower part of the same data. Using the special instructions in the instruction set will result in programs that work without generating align- ment related errors. These programs will be slower than their counterparts in which data is aligned in memory at the proper boundaries. Instruction alignment is a must. The programmer may choose whether data is aligned or not but there is no choice for instructions. Q 1: Can you see any advantage in working with unaligned data? Aside from the fact that these instructions must generate no error, they must also place the data of interest in the proper place in the destination register. In the figure below the most significant three bytes of a word are stored beginning with address 0x10000001, while the least significant byte of the same word is stored at 0x10000004. When loaded in a register, the most significant three bytes of the word must end up on the most significant three bytes in the register, while the least significant byte of the word (now stored on the most significant position of the word beginning at 0x10000004) should be merged with the other bytes on the least significant byte of the register. There are two instructions used to do the job, lwl and lwr. Similar instructions exist for dealing with half- words. lwl will read from a memory address (possibly unaligned) and will place the bytes starting with the current address up to the next aligned word address in the upper bytes of the destination register. The next example Laboratory 5: Postlab Memory Issues © 1996, Virgil Bistriceanu will clarify how the instruction works. Ex 1: lui $t0, 0x1000 # $t0 <- 0x10000000 lwl $t1, 1($t0) # read from address 0x10000001 The three bytes stored at addresses 0x10000001, 0x10000002, and 0x10000003 will be loaded in reg- ister $t1 on positions 3, 2, and 2 respectively (3 is the most significant byte, 2 is the byte next to it and so on). ■ Your job is to understand how the other instruction (lwr) works and then use the two instructions together to load unaligned words from memory. Step 1 Create the program lab5.7.asm which does • declare a word variable named word1 with the initial value 0x89abcdef • loads (using lwl) the registers $t0 to $t3 with data from memory, using as base address the address of word1 and displacements from 0 to 3 respectively. Run the program. Based on the values stored in registers fill the missing spaces in the following figure. The bold vertical arrow indicates the address lwl reads from. Use slanted lines to indicates which bytes are trans- ferred in the register and on what position(s) in the register. 0x10000000 0x10000004 $i An unaligned word stored in memory at address 0x10000001 The same word loaded in register $i 0x10000000 0x10000000 0x10000000 0x10000000 $t0 $t1 $t2 $t3 Memory Register
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