Download Midterm Exam 1 - Computer Architecture II: Hardware-Software Interface | CS 366 and more Exams Computer Architecture and Organization in PDF only on Docsity! CS 366 - Computer Architecture II, Midterm Exam #1, page 1 of 5 CS 366 - Computer Architecture II Midterm Exam #1 - Prof. Reed Fall 2003 What is your name?: ___________________________(4 points) There are two sections: I. Short Questions . . . . . . . . .30 points; (15 questions, 2 points each) II. Short Sections of Code . . .66 points; ( 11 questions, 6 points each) --------------- 96 points + 4 for name = 100 points total This test is worth 15% of your final grade. This test is open book and open notes. You have 60 minutes. I. True/False: (2 pts. each) T F 1. In the course we have been studying MIPS assembly language programming, where MIPS stands for Millions of Instructions Per Second. T F 2. There is at least one MIPS assembler instruction that can directly store a result of an ALU calculation into memory. T F 3. In addition to the 32 MIPS register file registers having mnemonic names such as $t3, the registers can be referred to by their number, starting from $1 up to and including $32. T F 4. Usage conventions for register use (what registers are used for what purposes) are strictly enforced by the assembler. T F 5. The value part (in this case 0xffff) of the instruction li $t3, 0xffff can actually be a 32-bit value. T F 6. A carry-out at the most significant bit after an addition of two signed numbers always indi- cates overflow. T F 7. A carry-out at the most significant bit after an addition of two unsigned numbers always indi- cates overflow. T F 8. Overflow will never occur if two signed numbers of different signs are added. T F 9. Even if they are not being used as parameters, it is necessary to always leave room on the stack for $a0 through $a3. T F 10. In generating code, compilers can translate a multi-dimensional array into a row-major, sin- gle-dimension array, where a mapping function is implemented to index into the correct array element. T F 11. Instructions can be treated as data in an assembler program. T F 12. Memory-mapped I/O means that a copy of an I/O device memory is kept in main memory. T F 13. The MIPS pipeline has a separate instruction cache and data cache because the two caches store values in different formats. CS 366 - Computer Architecture II, Midterm Exam #1, page 2 of 5 T F 14. The trap handler discussed in class is an example of reentrant code since it can be called by more than one process. T F 15. Consider the code segment: The output of running this program segment is: III. Short Answer: (6 points each) Where there are multiple steps, please circle your final answer. You must show your work for credit. 1. Consider the following instruction: srl $a0,$t5,3 Write this instruction in hexadecimal. 2. After running a program using PCSpim, the logfile is saved and examined. You notice that the instruc- tion bltz $v0 0x5c is translated into hex as: 0x04400017 Where did the rightmost two hex digits (17) come from? .data first: .ascii "One\n" second: .ascii "Two\n" third: .ascii "Three\n" done: .asciiz "Done." .text main: la $a0, first li $v0, 4 syscall la $a0, done li $v0, 4 syscall One Done. CS 366 - Computer Architecture II, Midterm Exam #1, page 5 of 5 10. Consider the following section of code: a) What is the purpose of the first 3 lines? b) In what context is this used? 11. Is a nop instruction always needed after a branch when running on a pipelined machine? Explain why or why not. ... addi $a0, $a0, 4 # line 1 srl $a0, $a0, 2 # line 2 sll $a0, $a0, 2 # line 3 li $v0, 9 syscall CS 366 - Computer Architecture II, Midterm Exam #1, page 1 of 5 CS 366 - Computer Architecture II Midterm Exam #1 - Prof. Reed Fall 2003 What is your name?: ___________________________(4 points) There are two sections: I. Short Questions . . . . . . . . .30 points; (15 questions, 2 points each) II. Short Sections of Code . . .66 points; ( 11 questions, 6 points each) --------------- 96 points + 4 for name = 100 points total This test is worth 15% of your final grade. This test is open book and open notes. You have 60 minutes. I. True/False: (2 pts. each) T F 1. In the course we have been studying MIPS assembly language programming, where MIPS stands for Millions of Instructions Per Second. T F 2. There is at least one MIPS assembler instruction that can directly store a result of an ALU calculation into memory. T F 3. In addition to the 32 MIPS register file registers having mnemonic names such as $t3, the registers can be referred to by their number, starting from $1 up to and including $32. T F 4. Usage conventions for register use (what registers are used for what purposes) are strictly enforced by the assembler. T F 5. The value part (in this case 0xffff) of the instruction li $t3, 0xffff can actually be a 32-bit value. T F 6. A carry-out at the most significant bit after an addition of two signed numbers always indi- cates overflow. T F 7. A carry-out at the most significant bit after an addition of two unsigned numbers always indi- cates overflow. T F 8. Overflow will never occur if two signed numbers of different signs are added. T F 9. Even if they are not being used as parameters, it is necessary to always leave room on the stack for $a0 through $a3. T F 10. In generating code, compilers can translate a multi-dimensional array into a row-major, sin- gle-dimension array, where a mapping function is implemented to index into the correct array element. T F 11. Instructions can be treated as data in an assembler program. T F 12. Memory-mapped I/O means that a copy of an I/O device memory is kept in main memory. T F 13. The MIPS pipeline has a separate instruction cache and data cache because the two caches store values in different formats. CS 366 - Computer Architecture II, Midterm Exam #1, page 2 of 5 T F 14. The trap handler discussed in class is an example of reentrant code since it can be called by more than one process. T F 15. Consider the code segment: The output of running this program segment is: III. Short Answer: (6 points each) Where there are multiple steps, please circle your final answer. You must show your work for credit. 1. Consider the following instruction: srl $a0,$t5,3 Write this instruction in hexadecimal. 2. After running a program using PCSpim, the logfile is saved and examined. You notice that the instruc- tion bltz $v0 0x5c is translated into hex as: 0x04400017 Where did the rightmost two hex digits (17) come from? .data first: .ascii "One\n" second: .ascii "Two\n" third: .ascii "Three\n" done: .asciiz "Done." .text main: la $a0, first li $v0, 4 syscall la $a0, done li $v0, 4 syscall One Done.