Next Steps for ECE 4750 Computer Architecture Course at Cornell University, Study notes of Computer Architecture and Organization

Download Next Steps for ECE 4750 Computer Architecture Course at Cornell University and more Study notes Computer Architecture and Organization in PDF only on Docsity! ECE 4750 Computer Architecture, Fall 2016 Next Steps School of Electrical and Computer Engineering Cornell University revision: 2016-08-24-11-04 Regardless of whether or not your are officially enrolled in this course, if you are interested in taking this course for either credit or as an auditor you must go through the following steps. 1. Read the course syllabus The course syllabus contains essential information about the course motivation, structure, proce- dures, and policies. It will be assumed that all students have read and understand all of the material in the course syllabus. We will not waste lecture time repeating what is in the syllabus, so it is difficult to stress how important it is to read the entire syllabus! 2. Log into Piazza We will be using Piazza for online discussion and most student/instructor communication. Both students officially enrolled and on the waitlist will be automatically added to the Piazza page for this course on Thursday, August 25th. As soon as you receive the welcome email, please log into Piazza to ensure that it is working. 3. Prepare for first quiz There will be a short five-minute quiz at the very beginning of lecture on Monday, August 29th on the ECE 4750 collaboration policy as described in the course syllabus. You should read the course syllabus to prepare. 4. Work through lab tutorials We are preparing four tutorials covering the Linux development environment, Git version con- trol, the PyMTL Hardware Modeling Framework, and the Verilog Hardware Description Language. The tutorials have critical information on how to access the ECE computing resources, how to use GitHub/TravisCI, and how to manage your lab group. Please complete these tutorials as soon as they are posted on the public course website. 5. Attend discussion section on Friday in 203 Phillips Hall Attendance at the weekly discussion sections is optional but strongly encouraged. This week we will be reviewing the basics of the PyMTL Hardware Modeling Framework we will be using in the lab assignments. Next week we will review the basics of the Verilog Hardware Modeling Language. The discussion section is on Friday from 2:30–3:20pm in 203 Phillips Hall. 1