Nodal analysis , mesh analysis, Kirchhoff law, Exercises of Electrical Circuit Analysis

Download Nodal analysis , mesh analysis, Kirchhoff law and more Exercises Electrical Circuit Analysis in PDF only on Docsity! Name: Score: ____________ / 200 Partner: Laboratory # 4 KVL, KCL and Nodal Analysis EE188L Electrical Engineering I College of Engineering and Natural Sciences Northern Arizona University Schedule Week 1: Activity #1 Week 2: Activities #2-4 Due: Beginning of following lab class Grading: Activity #1 / 50 Activity #2 / 80 Activity #3 / 20 Activity #4 / 50 Objectives At the completion of this lab, the student will be able to: 1. Apply Ohm’s Law 2. Apply KCL 3. Apply KVL 4. Transform between Wye and Delta resistor configurations. 5. Run a dc simulation using Multisim and determine the simulated values of node voltages and device currents 6. Effectively use the DMM, Protoboard, and power supply Important Concepts 1. Kirchhoff’s Voltage Law, or KVL, is based on the principle of conservation of energy. We apply this in electric circuits by noting that the sum of voltages around any loop must equal zero. An analogy is going on a hike, up and down some hills, and coming back to the trail head, which is at the same elevation as when you started. Similarly, when you follow a loop through various devices around a circuit, the voltage may increase or decrease across each device but the voltages sum to zero. 2. Kirchhoff’s Current Law, or KCL, is based on the principle of conservation of charge. Current is the movement of electrically charged particles. Consider a node in a circuit with several devices connected to it. Each device either has current entering the node or leaving the node. KCL means that the total current entering the node must leave the node, or Ientering = Ileaving. 3. Nodal Analysis is a circuit analysis technique that applies KCL to each node, resulting in a set of equations that can be solved simultaneously to find all the node voltages in the circuit. Note that you do not write an equation for the ground node. EE 188 Lab 4, rev 9-13 Page 1 of 9 4. Circuit Simulation is a computer program that simulates the behavior of a circuit by calculating the node voltages and device current for an entire circuit using nodal analysis. This is quite handy for evaluating complex circuits. Special Resources 1. The following files must be available in the class folder. a. How to Run Multisim.ppt b. Lab 03 – KVL, KCL, Nodal Analysis.ppt c. MultisimManual.pdf d. lab03_delta.msm e. solve3x3.m Activity #1 Simulation Consider the circuit in Figure 1. The resistors are uniquely labeled (R1, R2 and so on). The nodes are likewise uniquely labeled with a number in a circle. Note that ‘0’ is the ground node which is 0 V. The network formed by resistors R2, R3, R4, and R5 is a called an “H Network” or “Bridge Network”. The resistor in the middle, R6, represents the load device. We will use the circuit simulation program Multisim in this lab to simulate the circuit. The input to Multisim is a schematic with the components connected properly and appropriate device values. The outputs are the node voltages and device currents. 1. Copy the Multisim schematic file lab03_delta.msm from the class folder to your disk space. 2. Double-click the file lab03_delta.msm to open. Multisim should launch. Type Ctrl-D if the text box is not visible. See the Multisim window image in the file “Lab 03 – KCL, KVL and Nodal Analysis.ppt” in the class folder. 3. Double-click each resistor and change the resistance value to the desired value as shown in Figure 1. Save the file. 4. Run the simulation. The instructions are in the PowerPoint file “How to Run Multisim.ppt” in the class folder. 5. From the simulation results, note the node voltages on the schematic in Figure 1. Also note the device currents on the schematic. Be sure to include an arrow indicating current direction along with the value and the units. You need all of these for a valid current. Only the voltage source current is given in the simulation results. How do you determine the resistor currents? 6. The equivalent resistance seen by the voltage source (between node 1 and node 0) can be found by using Ohm’s Law (V = IR) and dividing the voltage of the voltage source by the current through the voltage source. Req with  configuration = . EE 188 Lab 4, rev 9-13 Page 2 of 9 3. Using the Protoboard, build the circuit in Figure 1, connecting the power supply after all other connections are made. 4. Measure source voltage and the resistor voltages indicated in Table 2. Note the ‘+’ and ‘-‘ terminals by the subscripts in column two. V1,2 means the ‘+’ is at node 1 and the ‘-‘ is at node 2. Table 2. Measured Voltages. Vx,y – note x,y Measured Voltage, V Calculated Current, mA Simulated Current, mA % Error Current Vsource V4,0 -- -- -- R1 V4,1 R2 R3 R4 R5 R6 5. Calculate the current in each resistor using Ohm’s Law and fill in the Calculated Current column. 6. The values in the Simulated Current column are the resistor currents from the schematic in Figure 1. 7. Calculate % Error using Simulated Current as the standard. % Error Current = 100 * ( Calculated Current – Simulated Current ) / Simulated Current 8. Note the worst case error between the simulated and the measured values. What causes the difference? 9. Now you will verify Kirchhoff’s Voltage Law with the two loops in Table 3 and another loop of your choosing. These voltages can be obtained from Table 2. Note that V1,2 = – V2,1. V1,2 means the ‘+’ is at node 1 and the ‘-‘ is at node 2. EE 188 Lab 4, rev 9-13 Page 5 of 9 Table 3. KVL Verification Loop 1 (1, 3, 2, 1) Loop 2 (4, 0, 2, 3, 1, 4) Loop 3 ( ) -- V4,0 = -- V0,2 = V1,3 = V2,3 = V3,2 = V3,1 = V2,1 = V1,4 = V = V = V = 10. Kirchhoff’s Voltage Law states that the voltages around the loop should all sum to 0 V. Calculate the sum of the voltages around each loop and note in the last row of Table 3, the V row. The sum will likely be within a few 10s of mV of 0 V due to measurement error. 11. To verify Kirchhoff’s Current Law, you will need the current through the voltage source, which can be measured with the DMM in series with the voltage source. Here’s how to measure the current. On the DMM, move the red lead to the 100 mA current input and push the DC current measurement button. Open the connection between the positive terminal of the voltage source and R1. Connect the red lead of the DMM to the positive terminal of the voltage source and the black lead to the node 4 side of R1. The value on the DMM will be the current entering the red lead. See the file in the class folder “Electronics Lab Equipment.ppt” for details about using the DMM. Current leaving ‘+’ terminal of voltage source ________________ 12. For each node listed in Table 4, sum the currents entering and leaving each node. Table 4. KCL Verification Node 1 Node 2 Node 0 Ientering = Ileaving = Ientering =Ileaving? 13. Now to verify Kirchhoff’s Current Law. Does the sum of the currents entering the node equal the sum of the currents leaving the node? Note this in the last row of Table 4. The sums will likely be within a few 10s of A of each other which is within the measurement accuracy. 14. If you change the voltage source to 5 V, what do you expect to happen to the voltages and currents in the circuit? EE 188 Lab 4, rev 9-13 Page 6 of 9 15. Change the source voltage to 5 V. Measure some new resistor voltages and note in Table 5. You can copy the resistor voltages when Vsource was 10 V from Table 3. Table 5. Measured Voltages. Vx,y – note x,y 10 V - Measured Voltage, V 5 V - Measured Voltage, V 1 V - Measured Voltage, V Vsource 16. If you change the voltage source to 1 V, what do you expect to happen to the voltages and currents in the circuit? 17. Change the source voltage to 1 V. Measure the same resistor voltages and note in Table 5. 18. Can you devise a rule for how the node voltages scale with the source voltage? Activity #3 Delta-Wye Transformation Now we want to find the equivalent resistance of the physical circuit. Note that R4, R5 and R6 form a Delta (or ) configuration. 1. Disconnect the voltage source and measure the equivalent resistance between node 4 and ground of the circuit and record. Req with  configuration = . 2. Change the Delta network to a Wye network. Use the closest standard resistor value to what you calculated above for each resistance so you will still have 6 resistors total. 3. Measure equivalent resistance between node 4 and ground of the circuit with the Wye network and record. Req with Y configuration = . EE 188 Lab 4, rev 9-13 Page 7 of 9