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Computer System Design II / Computer Architecture: Fall 2007 Course Outline - Prof. Brian , Study notes of Computer Architecture and Organization

The tentative course outline for computer system design ii and computer architecture (eel 4768c and cda 4150) offered at the university of central florida in fall 2007. The course covers control and data path design using a hardware description language, microprogrammed architectures, instruction pipelines, cache and virtual memory, and risc. Students will learn about basic processor design, hardwired and microprogrammed control, alu, memory organization, pipelining, i/o, and computer arithmetic.

Typology: Study notes

Pre 2010

Uploaded on 11/08/2009

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Download Computer System Design II / Computer Architecture: Fall 2007 Course Outline - Prof. Brian and more Study notes Computer Architecture and Organization in PDF only on Docsity! EEL 4768C and CDA 4150 Fall 2007 Tentative Course Outline Computer System Design II/Computer Architecture: PR: EEL4767C or CDA3103 Control and data path design using a hardware description language, micro programmed architectures, instruction pipelines, cache and virtual memory and RISC. This includes basic processor design, hardwired and microprogrammed control, ALU, memory organization, pipelining, I/O and computer arithmetic. Instructor: Dr. Brian Petrasko: Office: HEC 211; Tel.: 823-2549 ; Email: petrasko@mail.ucf.edu Office Hrs. MW 12:30-2:30, TR 3:30-4:30 Home page: http:// www.eecs.ucf.edu/courses/eel4768 Text: Hennessy, J. and Patterson, D. Computer Architecture, Fourth Edition, Morgan Kaufmann Reference Texts : Patterson, D. and Hennessy, J. Computer Organization and Design, Third Edition, Morgan Kaufmann Cragon, Harvey G., Computer Architecture and Implementation, Cambridge University Press Roth, C. H. Jr., Fundamentals of Logic Design - 5th Edition Pellerin David and Douglas Taylor VHDL Made Easy!,Prentice Hall Grading: · 2 Exams@20% and Final@ 30% · Laboratory @ 20% · Homework and Quizzes @10% Note: 1) Assigned homework may be collected for grading or may be replaced by an unannounced quiz. 2) Unprofessional behavior may result in a lowering of the grade in an evaluation unit and/or the course. 3) Attendance is expected and may enter into the grade calculation 4). Cell Phones are to be turned off during class. Lecture Topics Schedule (Tentative): Review of Logic Design and Intro. To VHDL, Notes (3 weeks) RTL/ Data Path and Control Level of Design and VHDL, Notes (3 weeks) Instruction Set Principles and MIPS, Chapter 1 and Appendix B Topics (2 weeks ) CPU Design, Notes and Appendix A Topics (3 weeks) Memory System Design Appendix C Topics (2 weeks ) I/O and Current Architectures Notes (1 week) Laboratory Topics Schedule: Lab will begin in the second week. This is the first offering of this co-located course. The laboratory component is structured as an open lab. Laboratory assistants will be in the laboratory, Rm EN1-257, at specified times (EEL 4768C lab sections times ) to assist in the coding and the interpretation of results. The laboratory exercises will be presented in class and performance will be evaluated by completion and reporting. Laboratory topics will also be included in homework, quizzes and exams. There will be five assignments on the following topics:VHDL - Introductory Examples (6 weeks). VHDL - Simple Microcomputer (SM) Design Project. (3 weeks). VHDL - Extension of the Simple Microcomputer (3 weeks)
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