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\ 5 Mid Term Exam — November 22, 2018 fime:2
FQue +9 Marks: 30 points
Instructor Dr. Wagih G, Girgis No of Pages: No of Questions: 9
Solve the folloy problems:
: ERT circul nin fig.
1, What is the logic function performed by the following MOSFET circuits show! iB
(4 points).
Y1=(AB) ae
vy
fond Y
Y=YI=AB a fm
tH
(Vy AND ( )NAND ( )OR ( )NOR (| )XOR ( )XNOR
bt,
The function is :
he
=D+(A+ B.C)
The function is:
( ) AND ( )NAND ( JOR ( )NOR (| )XOR ( )XNOR
( Vv ) NON Of the above
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6 ns, , Vbi=0.7V, Cyo = 0.4 pF, and R= 5 K Q. [2 Points]
. . we . e stored char}
2.a. Estimate the storage time ts, that is, the time it takes to remove the si
in the circuit shown in Fig., when, forward biasing Vr = 5 V, rev!
ge in the diode connected
erse biasing Vr = -5 V, carrier lifetime T: =
! Diode current
Vp-0.7% ran
R K—> Diode voltage
407. >
pK time
tefl 4 we ee Ve
< >
ty bry ty
Forward Voltage = 5
Reverse Voltage = -5
Resistance K ohm = 5
Depletion capacitance Pico Farad =0.4
Life time nano Sec = 6
If=(V£-0.7)/R =(5-0.7)/5 = 0.8600
Ir=(Vr-0.7)/R = (-5-0.7)/5 = -1.1400
Ts = Tau * log ((If-Ir) /(-Ir) )= 3.3727
Tr = (10E~-3) *R*Cj*1log(10)= 0.0461
Trr= Ts+Tr = 3.4188
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. Calculate the overall resistance between points A and B if Rsquare = 2KQ, [2 Points}
co]
ee ee
Number of corners = 3. Number of squares = 6
Total resistance = (6+3x0.6) x Rsquare = 7.8X2= 15.6 KQ
3.c. For the MOSFET layout seen in fig, , write the SPICE statement including the areas and number of
squares in the source/drain regions with or without scale factor of 50 nm. [3 Points]
)
Ss G L
N-select
Estimates for the areas of the drain/source are
Ap = 40 and As = 45
The perimeters of the drain/source are estimated as
Pp =28 and Ps = 36
The length of the MOSFET is | and the width is 10, or,
L=1 and W= 10
The number of squares of n+ in series with the drain/source is
NRD = + +0 and NRS=41 x4
The SPICE statement for the MOSFET is
M1 0GSB NMOS L=1 W=10 AD=40 AS=45 PD=28 PS=36 NRD=0 NRS=4
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rd. Estimate the delay through a 400 KQ resistor made using an n-well with width of 15 and length
740. Assume that the capacitance of a 15 by 15 square of n-well to subsrate is 6 fF. |2 Points}
Number of squares = 450/15 = 30 square
Total capacitance = Number of squares X square capacitance = 30 X 6 = 180 {F
Delay time = 0.35 R C = 0.35 x 400x10° x 180x107'S = 25.2x107? = 25.2 ps
4. State if each sentence of the following is correct (\) or incorrect(x). [5 points]
( ) The n-well resistor value decreases with the increase of its width.
( ) Infra-red rays incidence on a photo-resistive liquid converts it to solid isolator.
( ) A photo-resistive material is representing the isolator above the p-substrate passive area.
( ) In spice programing the subcircuit call begins by the word GOTO.
( Vv ) The n-substrate should always be connected to Vau.
(
(
(
(
ee
X_ ) The n-well resistor value decreases with the increase of its thickness.
X ) The p-substrate should always be connected to Vaa
X_) The n-well can form a parasitic diode and or transistor with an N-substrate
4X) The n-well can be used as a resistor, The voltage on either side of the resistor must be large
enough to keep the substrate/well diode from forward biasing.
( X ) The growth rate of oxide increases with temperature. The main benefit of the wet oxide is fast
growing time. The main drawback of the wet oxide is the hydrogen byproduct.
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ind Kr = 25 pa/V?.
Determine:
- The threshold voltage (switching point) Vm
- The output and the input voltages at the transition point of the MOSFET (Vion , Vuin)-
- The output voltage at an input voltage of 4 V
- The average static power dissipation.
5 points).
(5 p ) A Yaa
Driver NMOSFET Constant KN uA/V2 : 100 8
Load NMOSFET Constant KP uA/V2 : 25 Gly p-channel
Driver Threshold Voltage VTN: 2
Load Threshold Voltage VTP unsigned : 1 p
Power Source Voltage VDD : 5 Vin | Ys Nort
e——— -——
Results | D|
k 2_k 2 ) 2)
(Vj, —Vron) =F (Vin -Vpp-Vro.p) LL meta
_ ‘s
{ 7) f
\k ik, |
Vin 1 i |= Vega tle “(Yop + V0,» |
wing teeny oor .
ji
Vron i (Von +Vr0.0)
Vv. = R =
n= ( [i
\1+.j—
! \ Vk }
Vm = Vin = Vsp = 2.6667
Vit = Vsp = 2.6667
Votn = Vit — Vrx = 2.6667 -2 = 0.66667
a Votp = Vit + Vir = 3.6667
\ k 2
fa [2-(Vs —Vyo.n)* Vout ~Vou® |= “(Vi -Vop~ Vr0,»)
Input Voltage Vin > Vit : 4
Vo=0
‘Consider a CMOS Inverter shown in fig. with Von = 5 V, Vix =2,[Vie]=1.V,5 Ky = 100 pa/v?
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