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P Channel MOSFET-Introduction to Microelectronic Circuits-Lecture 24 Slides-Electrical Engineering, Slides of Microelectronic Circuits

This course is taught in University of California, covers the fundamental circuit concepts and analysis techniques in the context of digital electronic circuits. Transient analysis of CMOS logic gates; basic integrated-circuit technology and layout are also included. P Channel MOSFET, Notation, P Channel, MOSFET, Common Source, CS, Amplifier, Load Line, Analysis, CS Amplifier, Equation, Voltage, Transfer Function, Quiescent, Operating Point, Bias, Circuit, Rules, Small Signal Analysis, Equivalen

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2011/2012

Uploaded on 02/27/2012

elmut
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Download P Channel MOSFET-Introduction to Microelectronic Circuits-Lecture 24 Slides-Electrical Engineering and more Slides Microelectronic Circuits in PDF only on Docsity! 1 Lecture 24, Slide 1EECS40, Fall 2003 Prof. King Lecture #24 OUTLINE • The common-source (CS) amplifier – load line analysis – DC bias circuit example – small-signal analysis of CS amplifier Reference Reading • Howe & Sodini: Chapter 8.1, 8.3 • Hambley (posted online): Chapter 12.2-12.5 Lecture 24, Slide 2EECS40, Fall 2003 Prof. King Notation • Subscript convention (Lecture 2, Slide 11): VDS ≡ VD – VS , VGS ≡ VG – VS , etc. • Double-subscripts denote DC sources (Lecture 23, Slide 7): VDD , VCC , ISS , etc. • To distinguish between DC and AC components of an electrical quantity, the following convention is used: – DC quantity: upper-case letter with upper-case subscript ID , VDS , etc. – AC quantity: lower-case letter with lower-case subscript id , vds , etc. – Total (DC + AC) quantity: lower-case letter with upper-case subscript iD , vDS , etc. 2 Lecture 24, Slide 3EECS40, Fall 2003 Prof. King P-Channel MOSFET Example • In a digital circuit, a p-channel MOSFET in the ON state is typically used to charge a capacitor connected to its drain terminal: – gate voltage VG = 0 V – source voltage VS = VDD (power-supply voltage) – drain voltage VD initially at 0 V, charging toward VDD Cload       −≅ DDp DSATp DD eq VI VR λ 6 51 4 3 VDD 0 V iD ( )2 2 TpDD p DSAT VVL WkI − ′ −= Lecture 24, Slide 4EECS40, Fall 2003 Prof. King Common-Source (CS) Amplifier • The input voltage vs causes vGS to vary with time, which in turn causes iD to vary. VDD RD + vOUT = vDS − + vIN = vGS − + –VBIAS vs − + iD • The changing voltage drop across RD causes an amplified (and inverted) version of the input signal to appear at the drain terminal.
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