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Fall 2000
Exam 2
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All questions must be answered on test paper!
Open Book, Open Notes
1. Estimate the delays in the circuit below using the RC model developed in class includ-
ing the effects of the transistor threshold voltages Vr, and Vp. Use as parameters the
channel resistances of the six transistors, Rj, ..., Rjg, and the node capacitances, C), ...,
Cs. You may assume that the capacitances already contain all parasitics from the tran-
sistors and interconnect.
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Poy M7 iL = V3
May | M8 7 mie Cs
Cy
a. Sketch the voltage waveforms for V3 when Vand V> are as shown below. Show the
value of the voltages in the diagram. Assume that V\(t) = Vgq, V(t) = 0 for t<0.
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b. What is the delay from V2 to V3 when V> goes from low to high (the first transistion in
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c. What is the , delay from V, to V3 when V; goes from high to low (the second transistion
in the figure)? Note that there ,oe from V; to V3, one through M9 and one
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d, What is the delay from V2 to V3 when V> goes from high to low (the third transistion
in the figure)?
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e. What is the delay from V; to V3 when V, goes from low to high (the fourth transistion
in the figure)? Note that there are two paths from V, to V3, one through M9 and one
through M10. — s
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£.What is the power consumption when V; and y are square waves with frequency f?
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