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Exam Questions for Bachelor of Engineering in Electronic and Computer Engineering, Exams of Computer Science

Exam questions for a computer engineering module of the bachelor of engineering (honours) in electronic engineering degree at cork institute of technology. The questions cover topics such as von neumann machine architecture, pipelining, high-end server organization, paged based memory management, process states, control and data hazards, superscalar execution, and fir filters. Students are required to answer questions through pseudo code, diagrams, and calculations.

Typology: Exams

2012/2013

Uploaded on 03/30/2013

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Download Exam Questions for Bachelor of Engineering in Electronic and Computer Engineering and more Exams Computer Science in PDF only on Docsity! Cork Institute of Technology Bachelor of Engineering (Honours) in Electronic Engineering – Award (NQF – Level 8) January 2007 Computer Engineering (Time: 3 Hours) Read instructions carefully Section A: Answer any TWO questions Section B: Answer any TWO questions Use separate answer books for Sections A and B All questions carry equal marks Examiners: Prof. G. Hurley Dr. S. Foley Dr. D. Pesch Mr. F. O’Reilly Section A Answer two (2) questions from this section. Q1 (a) List three fundamental principles of a Von Neumann machine architecture. Explain the benefits they bring and how/where these have appeared in the modern computer/programming model. [6 marks] (b) Explain how pipelining can create difficulties in memory access in a Von Neumann machine and how this can be tackled effectively. How is this solution implemented in modern micro- processors, (give examples)? [6 marks] (c) You have been asked to devise an algorithm to compute the following calculation across floating point vectors C and D each with 200,000 elements. You have available a Private Memory system with 100 processor nodes. 2 000,200 1 2 ])000,200[(])[( xDxCy x −= ∑ = Develop an algorithm using pseudo code or pseudo C code which could execute on one of these processor nodes. Describe the partitioning of the problem, the data distribution over the system and provide the code to achieve the communication between the nodes to calculate the final result. [13 marks] [Total: 25 marks] Q2 (a) Using diagrams describe how a high-end server type machine, with 4 commodity 32 bit processors (32 bit registers but 36 bit addresses for memory) (e.g. Sun UltraSparc or Pentium Xeon), would typically be organised, for good flexibility and performance. It will have 8-16 GB RAM. State and justify the memory models used. If you wanted to scale this machine for super-computing applications to 128 processors with 256 GB RAM, describe what changes you might make, stating why. [8 marks] (b) Describe using diagrams how a paged based memory management system can translate a virtual space of 2048MB (31 bit) into a physical space of 256 MB (28 bits). Take into account that the average active code/data block is 256 KB in size for this system. [10 marks] (c) Explain briefly what a process/task is. Draw a process state diagram, explain briefly the states in it, how one process follows it and the performance costs of managing/transferring between multiple processes. [7 marks] [Total: 25 marks] Q3 (a) Describe briefly two (2) of the following, using diagrams where appropriate. • Control and Data Hazards and their solutions • Superscalar Execution, benefits and assisting techniques. • Two High Performance interconnect networks. . [6 marks] (b) For Massive Parallel Systems, scalability is of major importance. Using work and efficiency curves describe your understanding of it and how memory and communication networks create the boundaries of this scalability. What effects do these have on algorithm design? [6 marks] (c) A 3 Tap FIR filter can be described using the following equation. ∑ = −= 2 0 )()()( k khknxny where x is the sample value and h the co-efficient. Show how this FIR filter can be represented using a 2-D data dependence graph and subsequently convert this into a 1-D Systolic Array processor. Show the inputs, outputs and all necessary timing information in the finished processor. [6 marks] Show how this would extend to a 5 tap filter. When the filter coefficients h(n) for a particular 5 tap application are calculated, it works out that odd coefficients ( h(1), h(3) ) have zero value. Show what effects this might have on the data dependence graph and derive efficiencies in the final 5 tap design. [7 marks] [Total: 25 marks] (ii) Assume that the 5 output lines are aggregated into a single output line of data rate R = 640kb/s. Calculate the average waiting time for packets in the queue for this case. Discuss what you observe when comparing this with the result of part (i) of the question? [10 marks] (b) (i) Briefly list the different locations within the topology of a computer network where routing decisions are usually made. (ii) Briefly explain how routing without any routing tables in nodes can work solely by including the destination address in a packet. [6 marks] (c) Using the Bellman-Ford algorithm, develop the least-cost routing table for source node 7 for the network of 8 nodes shown in Figure 1. The link costs are valid in both directions. In your answer also provide the least cost with each route between the source node and any other node. [9 marks] 3 3 1 6 1 7 4 8 2 5 5 1 7 1 1 2 4 3 Figure 1 NOTE: Some formulae you might find useful in answering questions 4, 5, and 6. ion time transmissframe delayn propagatio signal =a Stop-and-wait ARQ Go-back-N ARQ Selective-repeat ARQ 12 +> aN a PU 21 1 + − = aP PU 21 1 + − = PU −= 1 12 +< aN a PU 21 1 + − = ( )( )( )NPPa PNU +−+ − = 112 1 ( ) 12 1 + − = a PNU Little’s theorem: TA λ= and WAQ λ= M/M/1/∞ Queuing System: state probability of Markov chain ( ) iip ρρ−= 1 ρ ρ − = 1 A , µ λρ = M/M/m/∞ Queuing system: ρ ρ − = 1QQ PA and ρ ρρ − += 1Q PmA Probability of queuing in M/M/m: ( ) ( )ρ ρ − = 1!0 m mpP m Q , where ( ) ( ) ( )     − += ∑ − = 1 0 0 1!! 1 m i mi m m i mp ρ ρρ and µ λρ m = The solutions of the quadratic equation 02 =++ cbxax are a acbbx 2 42 2,1 −±− =
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