EE 231L Lab 2: Decoder Circuit Design using Discrete Logic and PLD - Prof. William Rison, Lab Reports of Digital Electronics

Download EE 231L Lab 2: Decoder Circuit Design using Discrete Logic and PLD - Prof. William Rison and more Lab Reports Digital Electronics in PDF only on Docsity! EE 231L Fall 2006 EE 231L Lab 2 Pre-Lab 2 1. Write an Altera TDF program to implement the decoder circuit using Boolean logic. 2. Write an Altera TDF program to implement the decoder circuit using one of the other design methods — CASE statement, TABLE, or IF-THEN statements. 3. Compare the design of the decoder circuit using discrete 74HC logic to that using a pro- grammable logic device (PLD). (a) How many chips are needed for each design? (b) How much wiring is needed for each design? (About how many wires did you need when you built the circuit using 74HC chips, and about how many will you need when you build it using your PLD?) (c) How much board space would be needed for the different designs? (d) Discuss some of the advantages and disadvantages of using discrete 74HC chips vs. using PLDs. Consider such things as board space (your PLD has 64 logic gates; each 74HC chip has a few gates), design time, cost of chips (the PLD in your kit cost about $5.00, vs. about $0.50 for each 74HC chip), power consumption (assume your PLD consumes about the same power as each 74HC chip), ease of prototyping and troubleshooting, ability to correct design errors, and anything else you can think of. When is it better to use 74HC chips in a design, and when is it better to use 74HC chips? 1