University of Illinois - Chicago

Prof. Shantanu S. Dutt

The content listed below has not been created by Prof. Shantanu S. Dutt

4.5

2 reviews

Prof. Shantanu S. Dutt

The content listed below has not been created by Prof. Shantanu S. Dutt

4.5

2 reviews

This professor on Docsity

Subjects

Electrical and Electronics Engineering

Digital Systems Design

Documents

Final Exam - Digital Systems Design | ECE 465

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Digital Systems Design - Homework 1 Solutions | ECE 465

Solutions of Homework 4 on Digital Systems Design | ECE 465

Midterm Exam Questions - Digital Systems Design | ECE 465

Combinational Logic using Hardware description Language | ECE 368

Midterm Exam with Solution - CAD Based Digital Design - Fall 2006 | ECE 368

Programmable Logic Arrays - Digital Systems Design | ECE 465

Solved Homework 2 for Digital Systems Design | ECE 465

ECE 465 Homework: Minimal Covering & POS Expressions (Spring 2009) - Prof. Shantanu S. Dut

New Probabilistic Algorithm for VLSI Circuit Partitioning - Prof. Shantanu S. Dutt

Digital System Design - Assignment 5 | ECE 465

Solutions to Homework 2 in ECE 465: Analysis of Sharing Implicants between PIs and CIs - P

Designing a 16-bit Majority Function Circuit using Divide-and-Conquer Approach - Prof. Sha

Introduction to CPLDs and FPGAs: Shantanu Dutt, University of Illinois at Chicago - Prof.

Lab Instruction for Setting up Synopsys VHDL Software and Running it | ECE 368

3 Questions with Solutions in Midterm Exam | Digital Systems Design | ECE 465

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Lab 1 in ECE 368: Designing Decoders using Divide-and-Conquer Method - Prof. Shantanu S. D

Algorithms for Global Routing - Physical Design Automation | ECE 565

EECS 465 - Spring 2009: State Equivalency, Next-State Logic, and Circuit Design - Prof. Sh

Designing a Ripple-Carry Adder in VHDL: Structural and Hierarchical Approach - Prof. Shant

Homework 2 Questions - Physical Design Automation | ECE 565

Midterm Exam Solutions - Digital Systems Design | ECE 465

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Next-State Logic: External I/Ps and Internal Wires - Prof. Shantanu S. Dutt

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Lab 7: VHDL Circuit Synthesis with Synopsys Design Compiler - Comparator Design - Prof. Sh

File I/O and Textio in VHDL: Reading and Writing Files with VHDL - Prof. Shantanu S. Dutt

Arithmetic Circuits, State Equivalency - Digital Systems Design – Final Exam | ECE 465

Finite State Machine (FSM) Design: Mealy and Moore Machines - Prof. Shantanu S. Dutt

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PLA Delay Minimization and 16-bit Adder Design - Prof. Shantanu S. Dutt

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VHDL Programming: Clock Signal Detection and Setup Time Checking - Prof. Shantanu S. Dutt

Quiz 1 Solutions - Digital Systems Design | ECE 465

Slides on Pipelining | CAD-Based Digital Design | ECE 368

Project on Electric and Computer Engineering | Digital Systems Design | ECE 465

Lab 4 Problems for CAD-Based Digital Design | ECE 368

Design Problem , Test Bench - CAD-Based Digital Design | ECE 368

ECE 368 Lab 2 - Designing a BCD-to-7-Segment Decoder with Minimized Cost - Prof. Shantanu

Digital vs. Analog Signals: Voltage, Time, and Logic (Binary) Signals - Prof. Shantanu S.

Goal, Design Problem, Implementation and Simulation using Quartus II | ECE 465

VHDL Programming: Understanding Processes, Sensitivity Lists, and Signal Assignments - Pro

Vending Machine Controller: Mealy FSM Design and Encoding - Prof. Shantanu S. Dutt

ECE 465 Homework 2, Spring 2009: Problems on MUX, Adder, and PLA Design - Prof. Shantanu S

Notes on Digital Design - Datapath Control | ECE 368

VHDL Course Material: Midterm Exam Solutions for ECE 368, Fall 2005 - Prof. Shantanu S. Du

Lab 5 for Design Problem - CAD-Based Digital Design | ECE 368

Paleozoic Life, Mesozoic - Review Notes for Test 3 | ECE 565

Lab 5: Designing a Multiplexer using Divide-and-Conquer Approach - ECE 368, Spring 2008 -

Designing and Controlling Data Paths - Handwritten Notes | ECE 368

Designing an 8-bit Comparator: TT Approach vs. Divide-and-Conquer Strategy - Prof. Shantan

Solutions to Midterm Exam - CAD-Based Digital Design | ECE 368

Two-Level Minimization Using Karnaugh Maps | ECE 465

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CAD-Based Digital Design - Computer Architecture - Notes | ECE 368