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Register Allocation - Compiler Optimisation - Lecture Slides, Slides of Computer Science

These are the Lecture Slides of Compiler Optimisation which includes Scalar Optimisation, Redundant Expressions, Dataflow Framework, Adaptive Compilation, Subexpressions, Find Available Expressions, Number of Iterations, Live Variables etc. Key important points are: Register Allocation, Clean and Dirty Spills, Global Allocation, Graph Colouring, Coalescing, Liveness Analysis, Spill Code, Beyond Basic Blocks, Interference Graph, Spill Candidates

Typology: Slides

2012/2013

Uploaded on 03/22/2013

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Download Register Allocation - Compiler Optimisation - Lecture Slides and more Slides Computer Science in PDF only on Docsity! Register Allocation Christophe Dubach February, 2013 M. O’Boyle Register Allocation February, 2013 1 Course Structure • L1 Introduction and Recap • L2 Course Work • L3+4 Scalar optimisation and dataflow • L5 Code generation • L6 Instruction scheduling • L7 Register allocation • Then high level approaches followed by adaptive compilation M. O’Boyle Register Allocation February, 2013 4 Local allocation • Focuses on basic block and maps virtual registers to physical registers • Top-down allocation computes a priority with most important ones allocated a reg the others are spilled. • Poor as virtual registers allocated a physical reg for the entire scope • Bottom-up - iterates over block allocation on demand. Frees a register if it “knows” that no longer needed. Uses distance to next use as as spill metric. • Spill clean values rather dirty as a way of minimising spill code M. O’Boyle Register Allocation February, 2013 5 Spill code 1 registers: 2 values to manage x = y = = y = x x = Mem[spill] = x y = = y x = Mem[spill] = x R1 = store R1 -> R0 % Mem[R0]=R1 R1 = = R1 load RO -> R1 % R1 = Mem[R0] = R1 Write spilled value to memory Note still need R0 register for storage address. M. O’Boyle Register Allocation February, 2013 6 Local allocation - spill code 2 registers: x1 clean in r1, x2 dirty in r2. Refer x3,x1,x2- must spill one: load x1 -> r1 load x2 -> r2 add r2, 1 -> r2 = x3 = x1 = x2 store r2 -> x2 load x3 -> r2 = r2 (use x3) = r1 (use x1) load x2 -> r2 = r2 (use x2) Spill dirty load x3 -> r1 = r1 (use x3) load x1 -> r1 = r1 (use x1) = r2 (use x2) Spill clean Not always best sequence x3,x1,x3,x1,x2 - better to spill dirty values Taking into account clean/dirty data makes it NP-complete M. O’Boyle Register Allocation February, 2013 9 Interference graph LRa = LRb= =LRb LRd= LRc= ...... LRd=LRc =LRa =LRd LRa LRb LRc LRd Live ranges interfere if one is live at the definition of another and have different values M. O’Boyle Register Allocation February, 2013 10 Graph colouring • Colour graph with k colours/registers • Important observation any node n that has less than k neighbours | n | < k can always be coloured • Pick any node |n| < k and put on stack • Remove that node and its edges - this reduces degree of neighbours • Any remaining nodes - spill one and continue • Pop nodes of stack and colour M. O’Boyle Register Allocation February, 2013 11 Graph colouring 1 2 3 4 5 1 2 3 4 5 b r g b g 3 colours. Remove 1 first as it has a degree less than 3. Colour as we pop M. O’Boyle Register Allocation February, 2013 14 Alternative spilling • Rather than spilling entire live ranges, spill only in high demand area -partial live ranges • Splitting live ranges. Can reduce degree of interference graph. Smart splitting allows spilling to occur in “cheap” regions • Coalesce - if two ranges don’t interfere and are connected by a copy - coalesce into one. Reduces degree of nodes that interfered with both M. O’Boyle Register Allocation February, 2013 15 Coalescing 1:add LRt, LRu -> LRa ... 2:addI LRa, 0 ->LRb 3:xor LRa, 0 -> LRc ... 4:add LRb, LRw -> LRx 5:add LRc, LRy -> LRz 1:add LRt, LRu -> LRab ... ... 3:xor LRab, 0 -> LRc 4:add LRab, LRw -> LRx 5:add LRc, LRy -> LRz Live range of a [1..3], b[2...4], c [3..5] connected by 2 copies in 2,3. Remove one copy here. Can also remove the other M. O’Boyle Register Allocation February, 2013 16 Coalescing Reduces Degree a cb c ab Guaranteed to not increase degree of interference on neighbours. If a node interfered with both both before, coalescing helps As it reduces degree, often applied before colouring takes place M. O’Boyle Register Allocation February, 2013 19 Ongoing work • Register allocation is a well studied topic. Linear scan for JITs • Eisenbeis et al examining optimality of combined reg alloc and scheduling. Difficulty with general control-flow • Partitioned register sets complicate matters. Allocation can require insertion of code which in turn affects allocation. Leupers investigated use of genetic algs for TM series partitioned reg sets. • New work by Fabrice Rastello and others. Chordal graphs reduce complexity • As latency increases see work in combined code generation, instruction scheduling and register allocation M. O’Boyle Register Allocation February, 2013 20 Summary • Local Allocation - spill code • Liveness analysis • Global Allocation based on graph colouring • Bottom-up approaches • Techniques to reduce spill code M. O’Boyle Register Allocation February, 2013
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