Cryptography and Computer Network Security Course at GMU - Prof. Krzysztof Gaj, Study notes of Cryptography and System Security

Download Cryptography and Computer Network Security Course at GMU - Prof. Krzysztof Gaj and more Study notes Cryptography and System Security in PDF only on Docsity! 1 Course web page: ECE 646 Cryptography and Computer Network Security ECE web page → Courses → Course web pages → ECE 646 at GMU since Fall 1998 Kris Gaj Office hours: Monday, Wednesday 7:30-8:30 PM Research and teaching interests: • cryptography • network security • computer arithmetic • VLSI design and testing Contact: Science & Technology II, room 223 kgaj@gmu.edu, (703) 993-1575 2 ECE 646 Part of: MS in EE MS in CpE Network and System Security (required) Computer Networks (elective) Certificate in Information Systems Security MS in E-Commerce MS in Information Security & Assurance Communications & Networks (elective) Computers Ph.D. in Information Technology Fall 2005 (as of August 28) MS CpE 17 MS EE 16 MS ISA 10 Ph.D. IT 3 others 4 5 deapth • viewgraphs / whiteboard • viewgraphs available on the web (please, extend with your notes) • books 1 required (Stallings) 2 optional (available on reserve in the Johnson Center) • articles (CryptoBytes, RSA Data Security Conf., CHES, CRYPTO, etc.) • web sites - Crypto Resources standards, FAQs, surveys Lecture 6 Homework (1) • reading assignments • theoretical problems (may require basics of number theory or probability theory) • problems from the main textbook • short programs • literature surveys Homework (2) • optional assignments short programs vs. analytical problems or HDL codes More time consuming Most time spent on debugging Relatively straightforward Typically less time consuming More thinking Little writing 7 Midterm exam 1 2 hours 30 minutes multiple choice test + short problems open-books, open-notes practice exams available on the web midterm exam review session - optional Monday, October 31st Tentative date: Midterm Exam 2 (project track only) take-home 24 hours literature search + analytical problems submission through WebCT Saturday, December 10 Tentative date: 10 • about four weeks to choose a topic and write the corresponding specification • regular meetings with the instructor • four oral progress reports based on Power Point slides • draft final presentation due at the last progress report Monday-Tuesday, December 5-6 • written report/article, 15-page IEEE style due Monday December 12 • short conference-style oral presentations Monday, December 19, 5:00-10:00 PM • contest for the best presentation • publication of reports and viewgraphs on the web Project (2) • Project reports/articles requirements - IEEE style - 15 pages maximum - appendices possible but do not influence the evaluation - source codes made available to the instructor • Review of project reports - reviews done by your fellow students - reviews due Friday, December 16, 8:00 PM - final version of the report due Monday, December 19, 5:00 PM Project (3) 11 • Project presentations (Monday, December 19, 5:00-10:00 PM) - conference style, Johnson Center - several sessions, refreshments - attendance in at least three sessions required - open to general public (in particular, students from previous years), ECE seminar credit - 10 minutes for the presentation + 5 minutes for Q&A - time strictly enforced Project (4) Project Types Software program in a high-level language (C, C++, Java) or assembly language Hardware behavioral model in HDL (VHDL, Verilog) mapped into FPGA or ASIC, verified using timing simulation Analytical comparative analysis of competing algorithms, protocols, or implementation options survey of the market Hybrid SW/HW HLL/HDL program for a reconfiguarble computer 12 MS CpE Students MUST choose implementation-oriented projects, i.e. Software Hardware, or Hybrid SW/HW IMPORTANT RULE!!! Follow-up courses Cryptography and Computer Network Security ECE 646 Secure Telecommunication Systems ECE 746 Computer Arithmetic ECE 645 15 Factoring of large numbers using Number Field Sieve Project topics - Software Prerequisites: C/C++ Assumptions: • based on a multi-precision arithmetic library • optimized for maximum speed • timing measurements for various number sizes Analysis of capabilities and performance of Java Cryptography Extension (JCE) Project topics - Software Prerequisites: Java Assumptions: • scope of the library • analysis of performance • comparison with C/C++ and ASM implementations • practical applications of the library 16 Implementation of a selected secret-key cipher Implementation of a selected public-key system, e.g., NTRU using FPGA devices. Project topics - Hardware Prerequisites: VHDL or Verilog, FPGA or semi-custom ASIC design Assumptions: • design in a hardware description language at the RTL level • optimization for maximum speed, minimum area, or minimum power • verification using available tools • logic synthesis to the gate/standard cell level • static timing analysis and timing simulation Implementation of a selected new mode of operation of a secret-key cipher providing both encryption and authentication (e.g., OCB, EAX, CCM) Project topics - Hardware Prerequisites: VHDL or Verilog, FPGA or semi-custom ASIC design Assumptions: • design in a hardware description language at the RTL level • optimization for maximum speed, minimum area, or minimum power • verification using available tools • logic synthesis to the gate/standard cell level • static timing analysis and timing simulation 17 Fully parallelizable hashing scheme with SL_2 Project topics - Hardware Prerequisites: VHDL or Verilog, FPGA or semi-custom ASIC design Assumptions: • design in a hardware description language at the RTL level • optimization for maximum speed, minimum area, or minimum power • verification using available tools • logic synthesis to the gate/standard cell level • static timing analysis and timing simulation • compare vs. microprocessor implementation New hash functions suitable for hardware proposed at Crypto 1994. No serious implementations so far. Interface µP memory µP memory . . . µP µP . . . I/O Interface FPGA memory FPGA memory . . . FPGA FPGA . . . I/O Microprocessor system Reconfigurable processor system What is a reconfigurable computer? 20 SRC Compilation Process Object files Application sources Macro sources MAP CompilerµP Compiler Logic synthesis Place & Route Linker .v files .bin files .ngo files .o files .o files Application executable Configuration bitstreams HDL sources Netlists .c or .f files .vhd or .v files Main program Function_1(a, d, e) Function_2(d, e, f) Function_1 Function_2 Macro_1(a, b, c) Macro_2(b, d) Macro_2(c, e) Macro_3(s, t) Macro_1(n, b) Macro_4(t, k) FPGA…… …… …… Macro_1 Macro_2 Macro_2 a b c d e FPGA contents after the Function_1 call Program in C or Fortran Run Time Reconfiguration in SRC 21 Implementation of a selected secret key cipher (RC5, IDEA, DES) using reconfigurable computer Project topics – Hybrid Software/Hardware Assumptions: • analysis of available literature, • high level design • specification of basic components • design of basic components and the entire system • functional verification • timing analysis Prerequisites: programming in C, basic understanding of hardware Factoring of large numbers using reconfigurable computer Project topics – Hybrid Software/Hardware Assumptions: • analysis of available literature, • high level design • specification of basic components • design of basic components and the entire system • functional verification • timing analysis Prerequisites: programming in C, number theory, basic understanding of hardware, knowledge of VHDL helpful 22 Elementary Operations used in Modern Secret Key Ciphers Projects – Hardware/Analytical • analysis of various algorithms from the point of view of hardware implementations • comprehensive library of basic cryptographic primitives Survey of Cryptographic Chips and IP cores Survey of commercially available integrated circuits implementing cryptographic algorithms Survey of commercially available FPGA IP cores implementing cryptographic algorithms Projects – Hardware/Analytical 25 Cryptographic capabilities of Network Processors Projects - Analytical Example: Intel IXP 2850 Key management Survey of software packages supporting Public Key Infrastructure Report on commercial Certification Authorities Projects - Analytical 26 Security Protocols • Secure WWW servers Security options in the WWW browsers Projects - Analytical • Secure protocols for wireless ad-hoc networks Security of RFIDs Challenge: Cryptographic operations need to be implemented using up to 1000 gates – new algorithms – new protocols Protection of privacy Projects - Analytical