Scrolling LED based Event - Microcomputer Applications - Exam, Exams of Microcomputers

Download Scrolling LED based Event - Microcomputer Applications - Exam and more Exams Microcomputers in PDF only on Docsity! CORK INSTITUTE OF TECHNOLOGY INSTITIÚID TEICNEOLAÍOCHTA CHORCAÍ Semester 1 Examinations 2009/10 Module Title: Microcomputer Applications Module Code: ELTR 7019 School: Electrical and Electronic Engineering Programme Title: Bachelor of Engineering in Electronic Engineering - Award Programme Code: EELXE_7_Y3 External Examiner(s): Dr. A. Donnellan Dr. P. O’Sullivan Internal Examiner(s): Mr. F. O’Reilly Instructions: Answer 3 Questions. All questions carry equal marks. Duration: 2 Hours Sitting: Winter 2009 Requirements for this examination: Note to Candidates: Please check the Programme Title and the Module Title to ensure that you have received the correct examination paper. If in doubt please contact an Invigilator. Q1 (a) List four categories/criteria under which one might examine an application to decide whether to use a micro-controller or microprocessor? [9 marks] (b) The following is a set of embedded electronics applications. o Electronic KeyFob/Door Opener. o Scrolling LED based Event List/Sign as used in a Hotel Foyer. o Computer to be placed in a Information Kiosk to give map/tourist directions. For the each of the applications listed identify, (i) Approximate number of Input & Outputs (ii) Estimate of speed/performance required. (iii) Complexity/Range of algorithms/programmes to execute. (9 marks) From the following micro-controller/microprocessors choices suggest and justify suitable models for each of the above applications. 8051 8-bit microcontroller, Intel Pentium 3 family, Microchip PIC, Motorola 68332 Micro-controller (6 marks) [15 marks] (c) The PIC 16c74 arranges its memory into two register banks. What advantages/disadvantages does this have? How do you control which register bank is addressed/selected at any time? [10 marks] [Total: 34 marks] PIC16C63A/65B/73B/74B PIC16C63A/65B/73B/74B TABLE 4-1 SPECIAL FUNCTION REGISTER SUMMARY TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) value on ; awe on] vate on jesamus| name | sur | ace | ace | wee ats atz ant wo ASRNER, acy] Attess| ame en | ene | exe | ace | ex | exe | ext | Bro | pon'em dees mas Bankt . an coresea tus. ncation ices contants ct ESK to scree sata memory (nit a amysicaleqiter) oem any ace anna} — [80% NDF! /agaressing hs location uses contents of FSR to adress data memory (not a physica register 20[o000 i Frere meaues Rr a mm] [em __Jornon-nes] REPU | weos | tocs | rose | Psa | sa | pst ta aanafaane anny pin [rou [Progran counars Leas Sgmnearco7e con v00n oe60 onva] [62 [Pou [Program Cours Po eas Senter foove pen ewe | me [| mo | Te eZee eevee] mus? [eT ei Te z | o | 1 ae |o0 aan RSH inciract cata memory adidas pointer Sener ceeu ima] om direct Gata memory ackirese pointer uuu uuu pen foorr [POR aks ae at wile BOTA ps we nea ev anna] PORTA Data Drecion Regt Sn an[- an ay —_feonnes | eoknst ata ater wen water: BOX IH pine wen rene renee son vest ema] [860 register nnnfan ial lara PORTS. PORTC Data Latch when wrsten: PORTS pins when read ou soe. LLU UL ™ wad ann aa joen PORTO! PORTO Cata Latch when wrtten: PORTO pins when read a AR atu uu on aa gaan aaa sa fpore P Se] [on wer | oF RTE Dat breton BS wana fooeo -114 AN PCLATH!#! — = = Mile Buffer far the upper 5 bits uf tae Program Counler =--¥ geay ---0 ovva| PCLATHI upper 5 bits of the Program Counter 0 0 RE TcoNe? GIF PrIF TOF PRIF THIF INT RRIF can ano aren One| sen intcon? alk TOE INTE RBIE ‘OIF INTF RBIF 1x | 0000 ach eure eset) apiel® Ke UIE SSbIR CORMIER THIF iM ean naa acen anna) ech la Pspie RCIE THE CCPIE | TMR2I TMRIE 0 on Se a = son [pe I sae [oonn = ocr Liciging register for the Least Sign leant Oyte of the “C-bit TRI reg/ster a AR atu uu sen |PCON POR BOR x Dr ang alee ot Sareantoye ce I-bt TOR easter wo wees aca wa) [50 —__ Jonrrpenenies = ra =] — [rewer[=icxrso tioscen TENE THRIGS TRIN --ov 07 ew wa) | = [Unmplemenea = oi 2 mais vay aren oma} [2% campers Fen |ssreur _[Srators Sena oot Revave wre Tans Hegsio Serer nes) Syneonous Sera Po (°C mosey Aare ete : SS meee aww] [2 ingen - Ter Jorn leastewenpa arian MEE) come mee mee owns] [55 = Junepleneries =o vm fenricon | = | = | copx | ennwy earws ence one on ay ~-en oma} [28 —_[unmplemenea — == a ose Toren ete eve D000 9Cc0 6069 eo a : van USAR Recto Dal eas con 3009 9660 0009 —_[onmpee = re Tava ww] [280 angered Ten Josrnat —|evstswenpa aria Rg mB) nner cw ows] [Sh [plead [c= son foarecon | — | = | canon | envoy earaws ecco conta coral on wy en ono = [Unimplemenea —[-= hen wowow" [roost | navsa | ons [one orev Sobne TOON eso 96 9 a660 oo a] [sen _[adcons™ [perez | porar | Por Tegerd. = unknown, w= unchanged, ¢= value depends on cordon, "= unimplemented, ad's 0 Tegend x= unknown, a= unchanged. q= vale d on, = uninploneniad, reads © Shade leatons are iment, ra 980 Shaded locations are unmperened, read as Note 1: Trooper yer of the prgtem ceantes snot dct 3¢coesble. POLATH ks hong cog forte PE=123 Note 1: Tho upper bytoof he program cout snot dct accessible PCLATH is aholting register forthe PC<126 2 [he ttivand its re"esenved vay rena ese bs des 2: The IRP andi esarved.ebeaysrarhain hese is leat 3: Other oon nowar up RFSET nes aortal RS eu VOT ans Warthog Tina Reset 3 Other non power-up) RESETS incado extemal RESET tough HICLR and Watchdog Timer Reset 4: ‘Those regstors ean bo adéresscd tom ether Ean 4: ‘These egsters can be addressed fom ether bank 5. POLIO POW te andthe pura stave pole nl inpleentedon the ICTECHBAL72E,abweys mania tese bs ond &: PORTO, PORTE andthe paral slave pot are not plemented onthe PICI8CB3A738; always maint these is and Tuo not mplomontod an th PICICOASAETS: nays mans those Dts and ees csr 6 THAD lsat implemented I6CE3AE86, atvays maintain these bis and registers clea TABLE 1 1-1: BAUD RATE FORMULA SYNC BRGH = 0 (Low Speed) BRGH = 1 (High Speed) 0 1 (Asynchronous) Baud Rate = Fosci(64(SPBRG*1)) Baud Rate = Fosci(16(SPBRG*1)) (Synchronous) Baud Rate = Fosc/(4(SPBRG+1)) N/A TABLE 1 1-2: REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR Address Name Value on: Value on Bir? | Bité | Bid | Bird | Bind | Bit2 | Bitt | Bito POR, all other BOR RESETS 38h TXSTA CSRC | 1X9 | TXEN | SYNC | — | BRGH | TRMT | TX9D | 0000 -010| 0000 -010 18h RCSTA SPEN | RX9 [ SREN| CREN | — | FERR | OERR | RX9D | 0000 -oox | 0000 -o0x 99h) ‘SPBRG Baud Rate Generator register 0000 0000 | 0000 0000 Legend REGISTE! ‘x = unknown, - = unimplemented, read as ‘0. Shaded cells are not used by the BRG. R 12-1: bit 7-6 bit 5-3 bit 2 bit 1 bit 0 ADCONO REGISTER (ADDRESS 1Fh) RWw-0 Riw-o RiW-0 RIW-0 RiW-0 RW-0 U-0 AW-O apcst | apcso | cHs2 [ cHsi [ cHso [GODONE] — ADON bit 7 bit O ADCS1:ADCSO: A/D Conversion Clock Select bits 00 = Fosc/2 ) Fosc/s 10 = Fosc/a2 11 = FRc (clock derived from the internal A/D module RC oscillator) CHS$2:CHSO: Analog Channel Select bits 000 = channel 0, (RAO/ANO) 901 = channel 1, (RAI 010 = channel 2, (RA2: 011 = channel 3, (RA3 100 = channel 4, (RA5/ 101 = channel 5, (REO/ 110 = channel 6, (REI 111 = channel 7, (RE2/AN7)(1 GO/DONE: A/D Conversion Status bit If ADON = 1 1 = AID conversion in progress (setting this bit starts the A/D conversion) 0 = A/D conversion not in progress (this bit is automatically cleared by hardware when the A/D conversion is complete) Unimplemented: Read as '0' ADON: A’D On bit 1= AID converter module is operating 0 = A/D converter module is shut-off and consumes no operating current Note 1: A/D channels 5, 6 and 7 are implemented on the PIC16C74B only. Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as 0) -n = Value at POR 1’ = Bitis set O' = Bit is cleared x = Bitis unknown REGISTER 12-2: ADCON1 REGISTER (ADDRESS 9Fh) u-0 u-0 u-0 u-0 u-0 RW-0 RW-O0 _-R/W-0 = =—7T- 7-7 = PcrG2 | PCFGt | PCFGO bit 7 bit 0 bit7-3 _ Unimplemented: Read as '0' bit 2-0 PCFG2:PCFG0: A/D Port Configuration Control bits PCFG2:PCFGO| RAO | RA1 | RAZ | RAS | RAS | REO /RE1)|RE2\)| Vrer coo A A A A A A A A_| Vow o01 A A A A_| Veer [A A A_| RAs 10 A A A A A D D D_ | Voo ot A A A A_| Veer [ D D D_ | Ras 100 A A D D A D D D_ | voo 101 A A D D | ver | D D D | RAS 11x D D D D D D D D_ | Voo A= Analog input = Digital I/O Note 1: REO, RE1 and RE2 are implemented on the PIC16C74B only. Legend: R = Readable bit W = Writable bit U = Unimplemented bt, read as ‘0° -n= Value at POR ‘1 = Bitis set ‘0 = Bitis cleared x = Bit s unknown