RISC Architectures: A Portland State University ECE 587/687 Fall 2008 Course Overview - Pr, Study notes of Computer Architecture and Organization

Download RISC Architectures: A Portland State University ECE 587/687 Fall 2008 Course Overview - Pr and more Study notes Computer Architecture and Organization in PDF only on Docsity! © Copyright by Alaa Alameldeen and Haitham Akkary 2008 RISC Architectures Portland State University ECE 587/687 2Portland State University – ECE 587/687 – Fall 2008 RISC I n RISC: Reduced Instruction Set Computer n Alternative to Complex Instruction Set Computer (CISC) n Simple instructions and addressing modes uHigh effective throughput (low CPI) ÿEffective pipeline: Most instructions execute in one cycle uShort cycle time uShort design cycle n But larger programs u2x larger than VAX 11/780 5Portland State University – ECE 587/687 – Fall 2008 Amdahl’s Law P = proportion of computation improved S = improvement speedup Example: Parallel Execution P: Parallel portion, S: Serial portion = 1-P N: Number of Cores SPP Speedup /1 1 +− = NPPNPS Speedup /1 1 / 1 +− = + = 6Portland State University – ECE 587/687 – Fall 2008 RISC I Performance Features n Large number of registers addressable by instructions u32 general purpose registers (GPRs) uR0 is always zero ( to support addressing modes) n Register windows for fast call and return operations (Paper) n Delayed branch 7Portland State University – ECE 587/687 – Fall 2008 Delayed Branch Static Program: I1 Jump Target I2 Target: I3 Branch execution sequence: I1, I3 Delayed branch execution sequence: I1,I2,I3 n Question: Which modern machine still supports delayed branches? n Question: What is the downside for delayed branches?