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MIPS Assembly Code and Machine Code for Computer Architecture Homework - Prof. Vishwani Ag, Assignments of Computer Architecture and Organization

The solution to problem 1 and 2 of homework 3 for the computer architecture and design course, where the goal is to write mips assembly code and binary machine code for given c statements. It also includes register assignments and annotations for the machine code.

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Pre 2010

Uploaded on 08/16/2009

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Download MIPS Assembly Code and Machine Code for Computer Architecture Homework - Prof. Vishwani Ag and more Assignments Computer Architecture and Organization in PDF only on Docsity! ELEC 5200-001/6200-001 Computer Architecture and Design Spring 2007 Homework 3 Solution Assigned 2/5/07, due 2/12/07 Problem 1: Write MIPS assembly code and binary machine code for the following C statements: if ( i = = j ) f = g + h; else f = g ā€“ h; Specify the register assignments your assembly code uses and annotate the machine code to indicate the meanings of various bit fields. Assume that the assembly code begins at the byte address 80000 in the memory. Answer: Assume that the compiler makes the following register assignments: $s0 (Register 16) ā† f $s1 (Register 17) ā† g $s2 (Register 18) ā† h $s3 (Register 19) ā† i $s4 (Register 20) ā† j Then it will generate the following code: bne $s3, $s4, else # go to else (increment PC by 2) if iā‰ j add $s0, $s1, $s2 # f = g + h j exit # go to exit else: sub $s0, $s1, $s2 # f = g ā€“ h exit: (next instruction) Assembler will generate the following machine code: 80000 000101 10011 10100 0000 0000 0000 0010 (opcode reg19 reg20 -------else = 2----------) (bne = 5 $s3 $s4 branch to 80012 ) 80004 000000 10001 10010 10000 00000 100000 (opcode reg17 reg18 reg16 32 ) (add = 0 $s1 $s2 $s0 funct. ) 80008 000010 00 0000 0000 0100 1110 0010 0100 (opcode 20004 ) ( j = 2 jump to 80016 ) 80012 000000 10001 10010 10000 00000 100010 (opcode reg17 reg18 reg16 34 ) (sub = 0 $s1 $s2 $s0 funct. ) 80016 (next instruction) Problem 2: Implement the following pseudoinstructions using the MIPS instruction set: (a) not rdest, rsrs # put the bitwise logical negation of register rsrc # into register rdest (b) seq rdest, rsrc1, rsrc2 # set register rdest to 1 if register rsrc1 equals rsrc2, # and to 0 otherwise Answer: Pseudoinstructions are compiled into the following MIPS instructions: (a) nor rdest, rsrc, zero # each bit of rsrc is inverted and placed in rdest (b) addi rdest, zero, 1 # set rdest to 1 beq rsrc1, rsrc2, done # if rsrc1 = rsrc2, we are done-go to next instruction add redst, zero, zero # otherwise, set rdest to 0 done <instruction next to seq> Note: A pseudoinstruction should be compiled using minimum possible number of instructions. There is a better solution: xor rdest, rsrc1, rsrc2 # set rdest = 0 if rsrc1 = rsrc2 sltiu rdest, rdest, 1 # if redst = 0, i.e., < 1, then set rdest = 1 # otherwise set rdest = 0
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