Docsity
Docsity

Prepare for your exams
Prepare for your exams

Study with the several resources on Docsity


Earn points to download
Earn points to download

Earn points by helping other students or get them with a premium plan


Guidelines and tips
Guidelines and tips

Solutions for Exam II - Microelectronic Circuits | ECE 3040, Exams of Electrical and Electronics Engineering

Material Type: Exam; Professor: Doolittle; Class: Microelectronic Circuits; Subject: Electrical & Computer Engr; University: Georgia Institute of Technology-Main Campus; Term: Spring 2007;

Typology: Exams

Pre 2010

Uploaded on 08/05/2009

koofers-user-ws6
koofers-user-ws6 🇺🇸

10 documents

1 / 8

Toggle sidebar

Related documents


Partial preview of the text

Download Solutions for Exam II - Microelectronic Circuits | ECE 3040 and more Exams Electrical and Electronics Engineering in PDF only on Docsity! ECE 3040 Microelectronic Circuits Exam 2 March 31, 2007 Dr. W. Alan Doolittle Print your name clearly and largely: Solutions — Instructions: Read all the problems carefully and thoroughly before you begin working. You are allowed to use 1 new sheet of notes (1 page front and back), your note sheet from the previous exam as well as a calculator. There are 100 total points in this exam plus two bonus problems at the end of the exam. Observe the point value of each problem and allocate your time accordingly. SHOW ALL WORK AND CIRCLE YOUR FINAL ANSWER WITH THE PROPER UNITS INDICATED. Write legibly. If I cannot read it, it will be considered to be a wrong answer. Numeric answers without supporting work will be counted as wrong. Do all work on the paper provided. Turn in all scratch paper, even if it did not lead to an answer. Report any and all ethics violations to the instructor. Good luck! Sign your name on ONE of the two following cases: I DID NOT observe any ethical violations during this exam: I observed an ethical violation during this exam: First 20% True /False and Multiple Choice - Select the most correct answer(s) 1.) (2-points) True / The depletion capacitance of a junction is due to minority carriers separated across the junction. - 2.) (2-points) True frais Diode leakage current is proportional to the area of the device and the voltage across the diode.. 3) (2-poimsy eae False: Zener diodes can operate based on tunneling when an electron jumps through a very thin energy barrier even though it does not have enough energy to go over the barrier. 4) (2-points) True A transistor biased into saturation is turned on as hard as the circuit allows and thus makes the bet amplifiers. 5.) (2-points) (Trug)/ False: A BJT with a thin base quasi neutral width results in high common emitter current gain. 6.) points (Tri PD The base current of the BJT is dominated by the majority carriers in the bas¢ rot the minority carriers injected from the emitter. ai 7.) (2-points) If an engineer wanted to bias this c transistor into saturation mode, which of the +] v2 +] V1 +| va following is true? = = = a. V1>V2 and V2>V3 | : : b. V2>V1 and V2>V3 V1>V2 and V3>V2 + ~ W1<V2 and V3>V2 e. None of the above. 8.) (2-points) The law of the junction relates a. .., the leakage current of one side of the junction to the leakage current on the opposite side of the junction .. voltage produced across a junction to the excess carrier concentrations on both sides of the junction c. ... capacitance of the depletion region to the diffusion current in the junction. d. ... the doping concentrations on either side of the junction 9.) (2-voints) When a diode is forward biased to near the built in voltage... a _,,.the dominant current is drift current. + b .. the dominant current is diffusion current. 7 ... the dominant capacitance is diffusion capacitance: d ... the dominant capacitance is depletion capacitance- cS ... the energy bands are strongly sloped ® ... the energy bands are almost flat. &. None of the ahove 13) (20 — points) For the following circuit, the output voltage is desired to peak at a frequency the FCC (Federal Communications Commission) reserves for use by industrial “noisy” equipment, 13.56 MHz as shown below. The voltage source, has a DC plus AC combined voltage equal to Vin=Voctsin[t (27) (13.56MHz)] volts. If the zero bias junction capacitance, Cjo = 4 pF (i.e. 4e-12 F) and the built in voltage of the diode is 0.9V, what is the value of Vpc required to obtain the output voltage spike (resonance) at 13.56 MHz? You may ignore all resistances of the diode in reverse bias but not in forward bias. (Hint: The magnitude of the voltage at 13.56 MHz is irrelevant only the frequency is meaningful.) Vours Vn ae = Vin _2ee = | = Z.t te Fores Oe (~gmtec =D resonance = wy. _!_ we rm ls.s6 MH2) = L=le-4H C= ey Zz 4 pF =7 oe ip reg atreo! G3 oe = _teF | = [3p [- ve | ve Ve: 04 Va = -6,77 Vol +s (reverse Bias ) 14). Pulling all the concepts together for a useful purpose: (40-points total: DC solution = 12 points, conversion to small signal model = 12 points, AC solution = 12 points and 4 points for accuracy of the graph) For the circuit below: Diodes: Vtum on=0.7 V and I,=I,=1.83e-14A. Q1: Vium on=0.7 V, 1=1.83e-14A, Bpc=200, Va=200V VinAC = 1mV amplitude (i.e. 2mV peak to peak) at 1 kilohertz (period of 1 millisecond) = — ) IDe SR +7 173A Sa, > 150 Vi * ) DI'ZN VoutDc C5 | | eo {sna a ca | c2 ct ety VoutAC * Y Rout , 7 | ’ ay > ——_||__«_ |} + } a ay VinAC | hs | V3 ul == aad { | c D2 7% | > Re v2 | Gnd . ors S830 Given the above input voltage, VinAC, sketch and accurately label a plot the TWO output waveforms VoutAC and VoutDC on the graph paper provided on the next page. To do this you must solve the DC and AC solutions of the circuit. Assume the turn on voltages for all forward biased junctions are 0.7 V. You may assume all capacitors are very large values and are thus, AC shorts and any inductors are very large values, and thus AC opens. Additionally consider the circuit to be operated at low frequencies where you can neglect all small signal capacitances of transistors and diodes. Also, neglect all resistances that result from quasi- neutral regions. For full Credit, be sure to check your assumptions on the mode of operation of the transistor and to clearly label the axes of your plot. Hint: Use the CVD/Beta analysis for the DC transistor solution. Then apply your results to convert to the small signal model for both the BJT and diodes (i.e. do not ignore the small signal model of the diode). de OC cieeuts” 60mA 7 ee eee! : R, 2 ~v + Tg Rh +00 +TeRe -W=O 123 =IglR, + Re) Ig= 44.7 uA Te= PXIg= 444 mA c- im A xtra work can be done here, but clearly indicate with problem you are solving. Vert ty FA. Mode : Base — Ve= -AV 4TgR, = ~Ov Collectar Is Reverse. Biase S Base - Emitver i¢ Ferwalel Ve -4V + Tg Re x3 -~hy Biased. a Tefe = O,TV Ve=+%v ~ Leke = Small Signa con versior ho eftee (oper) ~~ Rs , Vous , 75 anya rad He fy Pee Gabe Vv 200 fp2 te 3 oxen = Fay Fe = 4.414 m A gn = vr = —~Gossq = 0.384 5 Vee +Va Yor ~ 4WTV +aoov g Le = —Gmana 20,578 SL Be Sobsston aut am b ee, wap Fr rel Row QR. a, Palle, lle, = OS )rinec RyMea, I, + Rs Op ~ veh fE\ eo sa @) crea )* Sa, Vehe “ah 0.45) (6) Pour = “bn¥n) (roll leoes ) 2 ~ (0.364) (65) om = ~ 4,45 rap © (SX) “a Av= (= ~)s Ca4.45) Co, a3) Co. 5) A= -'.6 VJ L
Docsity logo



Copyright © 2024 Ladybird Srl - Via Leonardo da Vinci 16, 10126, Torino, Italy - VAT 10816460017 - All rights reserved