Download Solutions for Exam III - Microelectronic Circuits | ECE 3040 and more Exams Electrical and Electronics Engineering in PDF only on Docsity! ECE 3040 Microelectronic Circuits
Exam 3
July 23, 2002
Dr. W. Alan Doolittle
Print your name clearly and largely: Sp [ nt 10 A gS
Instructions:
Read all the problems carefully and thoroughly before you begin working. You are
allowed to use 1 new sheet of notes (1 page front and back), your note sheet from the
previous exams as well as a calculator. There are 120 total points in this exam (100
points plus 20 bonus points). The exam will be graded ona 100-point basis. Observe the
point value of each problem and allocate your time accordingly. SHOW ALL WORK
AND CIRCLE YOUR FINAL ANSWER WITH THE PROPER UNITS
INDICATED. Write legibly. If I cannot read it, it will be considered a wrong answer.
Do all work on the paper provided. Turn in all scratch paper, even if it did not lead to an
answer. Report any and all ethics violations to the instructor. Good luck!
Sign your name on ONE of the two following cases:
1 DID NOT observe any ethical violations during this exam:
Tobserved an ethical violation during this exam:
First 20% Multiple Choice and True/False (Select the most correct answer)
1.) (4-points) If the MOS capacitor shown in the diagram to the
tight were used in a MOSFET transistor, which of the
following COULD result (more than one answer possible):
a.) NMOS transistor biased into Cutoff mode
b.) PMOS transistor biased into Cutoff mode
¢.) NMOS transistor biased into linear/triode mode
C4))PMOS transistor biased into linear/triode mode
€,), NMOS transistor biased into Saturation mode
PMOS transistor biased into Saturation mode
PMO
Dn vers ran
2.) (4-points) If the MOS capacitor shown in the diagram to the
tight were used in a MOSFET transistor, which of the
following COULD result (more than one answer possible):
a.) NMOS transistor biased into Cutoff mode
b,. PMOS transistor biased into Cutoff mode
Ce) OS transistor biased into linear/triede mode
a. PMOS transistor biased into linear/triode made
OS transistor biased into Saturation mode
J PMOS transistor biased into Saturation mode
3.) (4-points) If the MOS capacitor shown in the diagram to the
right were used in a MOSFET transistor, which of the
allowing COULD result (more than one answer possible):
ap OS transistor biased into Cutoff mode
b.)} PMOS transistor biased into Cutoff mode
c.} NMOS transistor biased into linear/triode mode
d.) PMOS transistor biased into linear/triode mode
¢.) NMOS transistor biased into Saturation mode
£} PMOS transistor biased into Saturation mode
4.) (4-points) If the MOS capacitor shown in the diagram to the
tight were used in a MOSFET transistor, which of the
following COULD result (more than one answer possible):
NMOS transistor biased into Cutoff mode
OS transistor biased into Cutoff mode
NMOS transistor biased into linear/triode mode
d.) PMOS transistor biased into linear/triode mode
e.) NMOS transistor biased into Saturation mode
f.) PMOS transistor biased into Saturation mode
5.) (4-points) For a MOSFET biased into saturation...
a.) The channel acts like a resistor connecting source to drain
The channel does not exist due to this region being fully depleted
yt channel acts like a resistor connecting source to drain but has a depleted region at the
drain end,
d.) The channel needs to be changed because there is never anything good on TV anyway.
e.) None of the above
fein fr configuration identification) 18 points for DC solution and 18 poiits for small
Pulling all the concepts together for a useful purpose:
7.) (60-points) Given the following circuit and material parameters,
(a) Determine the threshold voltage, Vz, flatband potential, Op, oxide capacitance per cm’,
Cox, and transistor transconductance parameter, Ky, (b) Identify the configuration of all
stages in the amplifier. (c) What is the AC voltage gain, Vou/Vin? You may assume all
capacitors have infinite capacitance and are thus, AC shorts. Additionally consider the
circuit to be operated at low frequencies where
capacitances, Grading will be based as such{20 points for plu,
chug calculations}4
signal analysis. 0g mynoR toe Gunes Ora T
Gelb
\ 2 ¢.- A! 4 = in| ee, e set)
nost_-7 4 lela
= O31 V
249 (4.954e-14)
ce
t.38e-6
= 2,5e-1 Fhe?
L
to
= 4k 00 5e- 1)
Gate Length, L=1 um \ A a
Gate Width, W=Z=10 pm. ra
Effective mobility, 1,=100 cm?/VSec Vr =2 b- + Ks & 2g Ma 2 G fe
Oxide Thickness, tox= Xox =13.8 nm Za, tee
Channel Length Modulation parameter, A=0.1 v' ox @ ds
Substrate Doping, Na=1.68e16 cm™ = Q lo. 371) 4 fh 148s) ai gett 4
Oxide relative Dielectric Constant, €,-oxide=Ko=3.9 2Se-7 HW 108: 950-14)
Substrate relative Dielectric Constant, €y-semiconductor=Ks=1 1.7
Substrate intrinsic concentration, n=1e10 com? Vebete Gavan
Dielectric Constant of free space, &p =8. pues F/om ac [.6$et6 Q) Su) . 4 V
Some ot { _
Plug and Chug Answers (As Yiese answers are required to continue on with the problem,
you may purchase these answers for 5 points each. Exam proctors should clearly mark
values as “PURCHASED”).
Vy= 5 V r= O37 | Vv
Cys 2.5071 Fem? K,=__a50aAfy*
Extra work can be done here, but clearly indicate with problem you are solving.
UC fer Or for M1"
Ven= Ov aa
S15 + BS
= BV
oy Rene = ase Ta
= (444
the Sguree is a Vos, = Van = 2. 75Y
Vos, 1oV - To s,(Rs)
Assame_Sutaratiah;
1 $54
ps, = (Voge Vew). a Vos, )
Tos, > (' 508 | (295- iy (is O1 Lov- Tos, io«])
Los, > [0.000388] [ 3 — Ios, Ik |
f
= 0.0007656 ~ Ios (0,3428)
SInee
T9s, “4:
T, = (0,000 1) S54 afl =Ips
bys, = | 49,3324 oe \
Vos,= lov (5544) lO
Vo = 446
Vesz a5 V
-\Vv ta,
Vr# Ves Vr 2 Vos =? Sarurati On
Extra work can be done here, but clearly indicate with problem you are solving.
DZ 2 “ Sinee yh YC curren gaure &
Ingares & Constant Current, MMs, should
be In Saturation, lov
gon
ae Ve= O4mAl Sis 2V
V;
Vos ag at ce OS > HEY - BY
Tos,- © ( Ves, - vw)? C1 +a Voss)
O4mA = [sat ) ( »46-1)'C +01 Voss )
t
i
5,01 V
Vesa-Vr < Voss
~— _- Sacturalte 3,
jug 2 SOL mar sarees!
V05a
Gm) = es) = 633 «Aly
Vosi- Vr
-— ZT
>
Sng = 282g wh WV
Vesg - Vr ~
—
+
fo = mo = 26. KIL
(Ves, V1)
wy, fey = 37,53 IZ