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Solved Problems in Final Exam - Advanced VLSI Design and Applications | ECEN 6263, Exams of Electrical and Electronics Engineering

Material Type: Exam; Professor: Johnson; Class: ADV VLSI DES & APP; Subject: Electrical and Computer Engineering ; University: Oklahoma State University - Stillwater; Term: Fall 2005;

Typology: Exams

2010/2011

Uploaded on 07/17/2011

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Download Solved Problems in Final Exam - Advanced VLSI Design and Applications | ECEN 6263 and more Exams Electrical and Electronics Engineering in PDF only on Docsity! ECEN 6263 Fall 2005 Final WRITE YOUR NAME HERE A ‘A gneve All questions must be answered on test paper! Open Book, Open Notes 1. Write verilog code for a 3-bit Johnson (not related) counter. The counting sequence is given in the following table and it repeals every 8 counts. You can write behavioral code or use cells from the 0.5 micron OSU cell library as you wish. count sequence Mo byte ‘hbo (el k Esurt)) aoa d ) 001 put lbs mo | OPE [RT Goudy 110 rr] Oe E207 (read, ie alway) 6( posed ge elk.) befir Cob reti te) Boop Mararunt = 8 bor | B’boo ls Newton > 3hoell; Z'botts nweert > 3/4 ol) S bolo! Awint 23S No BL hpot pw Mat 2 31h 3B UL Andes 2 39'S lol; Sb lol st hwardks 3° Ly yu) ' vo. Pp 23% b Ode f ante, e” Ke rn Oe Nabe . Cc v ECEN 6263 Fall 2005 Final S« DOM Secdhber 15,2005 7 page 1 of 3 nN 2. Design a simplified sign extension for partial products for a radix-8 multiplier. Use the same derivation as for a radix-4 (Booth) multiplier in the class notes. Hint: a radix-4 roultiplier has 2 bits in the sign extension. A radix-8 multiplier should have 3 bits in the sign extension. ‘Ny ations Ve a 5 wo 8, 5 SSS, Bod +h peur, f ' . 3 oy) wep [Sp SyeSgrr Sv AD FEO BO Ot Y Ip - 2. 20 ook) % f? ods) 5) wer [oS> Sy ECEN 6263 Full 2005 Final December 15, 2005 pitge 2 of 3
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