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Computer Architecture Exam Questions - Spring 2002, Exams of Computer Architecture and Organization

Comprehensive examination questions for a computer architecture course, covering topics such as i/o subsystem analysis, finite state machine conversion, combinational logic synthesis, branch prediction, and vliw and software pipelining. Students are required to answer only one question each from problems 1, 2, or 3.

Typology: Exams

2012/2013

Uploaded on 04/08/2013

gajpatti
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Download Computer Architecture Exam Questions - Spring 2002 and more Exams Computer Architecture and Organization in PDF only on Docsity! Comprehensive Examination Computer Architecture Spring 2002 There are 6 questions, but you should answer only one of question 2 or 3. (If you answer both 2 and 3, we will arbitrarily choose one to grade.) Problem 1 (I/O Subsystem) Suppose a computer has a backplane bus that connects the processor (which has an on-chip cache), the main memory, and an 1/O controller as shown below. The UO controller uses DMA to move data from various peripheral devices to main memory (i.e. the processor does not directly read data from the 1/O controller). The bus has 32 data lines and separate control and address lines, so it can sustain a bandwidth of 4 Bytes of data every cycle. The clock cycle time of the bus is 30 nanoseconds. What is the maximum rate (measured in Bytes per second) that data can be transferred from peripherals to the processor? Processor and Cache Peripheral devices Remember: answer only one of question 2 or 3. Problem 2 (Sequential Logic Analysis and Synthesis) This question concerns Finite State Machine Analysis and Synthesis with various Flip-Flop types. The state diagrams for all 4 flip-flop types are given below. S R = 1 0 S R S R = 0 1 J K J K = X 1 D I D D = 0 T = I T (Part A) Suppose you are given the following finite state machine implementation using T flip- flops. Convert this implementation to an equivalent one utilizing D flip-flops. C o u n t C l k
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