Exam Questions for Bachelor of Engineering in Electronic and Computer Engineering, Exams of Computer Science

Download Exam Questions for Bachelor of Engineering in Electronic and Computer Engineering and more Exams Computer Science in PDF only on Docsity! Cork Institute of Technology Bachelor of Engineering (Honours) in Electronic Engineering - Award January 2006 (NFQ - Level 8) Computer Engineering (Time: 3 Hours) Answer any two questions from Section A [50 marks] and any two questions from Section B [50 marks] Maximum available marks is 100. Examiners: Mr. F. O’Reilly Dr. D. Pesch Prof. G. Hurley Dr. S. Foley Section A Q1 (a) Where do Structural, Control and Data hazards occur? Describe what they are and describe solutions/workarounds for each of them. [6 marks] . (b) Explain briefly what a process/task is. Draw a process state diagram, explain briefly the states in it, how one process follows it and the performance costs of managing/transferring between multiple processes. [6 marks] (c) You have been asked to devise an algorithm to compute the following two stage calculation across floating point vectors A, B and C each with 200,000 elements. You have available a Private Memory system with 50 processor nodes. ∑ = = −+= 000,200 1 22 ][ ])000,200[(])[(][ x xCy xBxAxC Develop an algorithm using pseudo code or pseudo C code which could execute on one of these processor nodes. Describe the partitioning of the problem, the data distribution over the system and provide the code to achieve the communication between the nodes to return the final vector C and the result y. [13 marks] [Total: 25 marks] 2 Q2 (a) Explain using diagrams, the UMA and NUMA architectures, justify which architecture is more common and give the term commonly used to describe it. [ 6 marks ] (b) Describe and justify suitable interconnection networks to connect together commodity type processors(e.g. Power PC, Pentium Xeon) and memory for each of the following multiprocessor systems. Note the interconnection networks are likely to connect together 32 or 64 bit buses. (i) 4 CPU Video/Graphics Editing Station (ii) 8 CPU Shared Memory Trading System Server (ii) 64-128 CPU Scientific Simulation System [9 marks] (c) Describe using a real/worked example, how the performance or size of array processors can be improved through a mapping from location displacement to time displacement. [10 marks] [ Total: 25 marks] Q3 (a) In a paged memory management system, explain briefly the design process in deciding the size of pages, the numbers of pages, the number of page frames and page faults/replacements. [8 marks ] (b) A paging based virtual memory system has the following utilisations. CPU Utilisation 20% Paging Disk 85% Other I/O 5% Explain what is happening and what causes it. What steps if any do you think could be taken to improve CPU utilisation? [5 marks] (c) Describe briefly, using diagrams/examples where appropriate, the following. • Von Neumann Machine Principles. • Superscalar Execution, benefits and assisting techniques. • The Grand Challenges of Computing (listing 3 thereof) • The System Performance Evaluation Co-operative and its proposals. . [12 marks] [ Total: 25 marks] 5 Q6. (a) The input to a router is a data packet stream modelled by a Poisson process with arrival rate λ = 50 packets/sec. The length of the data packets is exponentially distributed with mean L = 512bytes. (i) Assume that the router has m = 4 output lines of data rate R = 64kbit/s which transmit packets from the head of the queue. Calculate the probability that arriving packets have to queue before transmission. (ii) Assume that the 4 output lines are aggregated into a single output line of data rate R = 256kb/s. Calculate the probability that an arriving packet has to queue for this case. What do you observe? [10 marks] (b) Explain the problems the Internet’s Routing Information Protocol (RIP) has with frequent changes in network topology. Briefly mention what remedy has been introduced for this over the past few years? [6 marks] (c) Using Dijkstra’s algorithm, develop the least-cost routing table for source node 3 for the network of 8 nodes shown in Figure 1. The link costs are valid in both directions. In your answer also provide the least cost with each route between the source node and any other node. [9 marks] 3 3 1 6 4 7 4 8 2 5 1 5 3 1 4 2 2 2 Figure 1 6 NOTE: Some formulae you might find useful in answering questions 4, 5, and 6. ion time transmissframe delayn propagatio signal =a Stop-and-wait ARQ Go-back-N ARQ Selective-repeat ARQ 12 +> aN a PU 21 1 + − = aP PU 21 1 + − = PU −= 1 12 +< aN a PU 21 1 + − = ( )( )( )NPPa PNU +−+ − = 112 1 ( ) 12 1 + − = a PNU Little’s theorem: TA λ= and WAQ λ= M/M/1/∞ Queuing System: state probability of Markov chain ( ) iip ρρ−= 1 ρ ρ − = 1 A , µ λρ = M/M/m/∞ Queuing system: ρ ρ − = 1QQ PA and ρ ρρ − += 1Q PmA Probability of queuing in M/M/m: ( )( )ρ ρ − = 1!0 m mpP m Q , where ( ) ( ) ( )     − += ∑ − = 1 0 0 1!! 1 m i mi m m i mp ρ ρρ and µ λρ m = Pollazcek-Khinchine formula: ( )X XW λ λ − = 12 2 and WXT += with ( )∑ ∞ = = 0k kk XPXX and ( )k k k XPXX ∑ ∞ = = 0 22 The solutions of the quadratic equation 02 =++ cbxax are a acbbx 2 42 2,1 −±− =