Download The Full Adder, Gate Delays – Combinational Circuits | CPSC 5155G and more Study notes Computer Architecture and Organization in PDF only on Docsity! CPSC 5155 Chapter 5 More Combinational Circuits The Full Adder This basic circuit hides the dynamics associated with changing values. Page 1 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Gate Delays Consider three gates, each of which has input that has not changed for some time. The output of each gate correctly implements its Boolean function. We now consider what happens as the input to each gate is changed suddenly. Note that the output does not change at the same time as the input. For a short time, called a “hazard”, the output of the gate is not that of the Boolean function supposedly implemented. Page 2 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Full Adder with Gate Delays (Input Changes at T = 0) At this point, no outputs are correct. Page 5 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Full Adder with Gate Delays (T = 1) Some output is correct, but the upper AND gates are reacting to input at T = 0. Page 6 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Full Adder with Gate Delays (T = 2) The carry out is correct, but the sum out is reacting to input at T = 1. Page 7 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Shifters Logical Shifts Left Shift Right Shift Arithmetic Shifts (Preserve the Sign Bit) Page 10 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Shifters (Continued) Circular Shifts Left Circular Right Circular No bits are lost. Page 11 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Circuit for Logical Left Shift (Only four bits shown) X is the input and Y is the output Page 12 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Two Stage Left Shifter with Logical and Circular Shifts C = 0 for logical shift C = 1 for circular shift S1S0 indicates the size of the shift. Page 15 of 16 September 20, 2008 CPSC 5155 Chapter 5 More Combinational Circuits Thirty–Two Bit Shifter This is a “logarithmic shifter”. A cross–bar shifter is much more complex. Page 16 of 16 September 20, 2008
